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Searched refs:WORK1_REG (Results 1 – 1 of 1) sorted by relevance

/arch/arm/mach-lpc32xx/
Dsuspend.S17 #define WORK1_REG r0 macro
44 adr WORK1_REG, reg_bases
45 ldr CLKPWRBASE_REG, [WORK1_REG, #0]
46 ldr EMCBASE_REG, [WORK1_REG, #4]
50 orr WORK1_REG, SAVED_PWR_CTRL_REG, #LPC32XX_CLKPWR_SDRAM_SELF_RFSH