Searched refs:Z (Results 1 – 25 of 47) sorted by relevance
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350 |--WHICH IS X + X*Y*( [B1+Z*(B3+Z*B5)] + [Y*(B2+Z*(B4+Z*B6)] )351 |--WHERE Y = X*X, AND Z = Y*Y.362 fmulx %fp1,%fp1 | ...FP1 IS Z = Y*Y367 fmulx %fp1,%fp2 | ...Z*B6368 fmulx %fp1,%fp3 | ...Z*B5370 faddd ATANB4,%fp2 | ...B4+Z*B6371 faddd ATANB3,%fp3 | ...B3+Z*B5373 fmulx %fp1,%fp2 | ...Z*(B4+Z*B6)374 fmulx %fp3,%fp1 | ...Z*(B3+Z*B5)376 faddd ATANB2,%fp2 | ...B2+Z*(B4+Z*B6)[all …]
86 |--Y = |X|, Z = EXPM1(Y), SINH(X) = SIGN(X)*(1/2)*( Z + Z/(1+Z) )93 bsr setoxm1 | ...FP0 IS Z = EXPM1(Y)98 fadds #0x3F800000,%fp1 | ...1+Z100 fdivx %fp1,%fp0 | ...Z/(1+Z)
95 |--Y = 2|X|, Z = EXPM1(Y), TANH(X) = SIGN(X) * Z / (Z+2).108 bsr setoxm1 | ...FP0 IS Z = EXPM1(Y)112 fadds #0x40000000,%fp1 | ...Z+2
76 |--Y = |X|, Z = 2Y/(1-Y), ATANH(X) = SIGN(X) * (1/2) * LOG1P(Z).92 bsr slognp1 | ...LOG1P(Z)
68 fmovel #0,%FPSR |clr status bits (Z set)73 fmovel #0,%FPSR |clr status bits (Z set)
591 orl #neg_mask+z_mask,USER_FPSR(%a6) |set N and Z597 orl #z_mask,USER_FPSR(%a6) |set Z
88 | Z := X * constant89 | N := round-to-nearest-integer(Z)97 | that the calculated value Z is99 | Z = X*(64/log2)*(1+eps), |eps| <= 2^(-24).
54 ; 2. STATUS32.Z flag set if in U mode at time of interrupt (U:1,K:0)79 ; 2. STATUS32.Z flag set if in U mode at time of exception (U:1,K:0)148 ; 1. Utilize the fact that Z bit is set if Intr taken in U mode183 ; - Z flag set on K is inverse of what hardware does on interrupt entry228 ; INPUT: Z flag set if returning to K mode250 btst r0, STATUS_U_BIT ; Z flag set if K, used in restoring SP
529 gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;536 gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;543 gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;550 gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
148 /* 3-axis accelerometer X,Y,Z (or AD-IN instead of Z) */
63 gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;64 linux,code = <ASPEED_GPIO(Z, 2)>;69 gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;70 linux,code = <ASPEED_GPIO(Z, 0)>;
16 model = "Zynq Z-Turn MYIR Board";
109 gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;110 linux,code = <ASPEED_GPIO(Z, 2)>;115 gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;116 linux,code = <ASPEED_GPIO(Z, 0)>;
1944 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */1953 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */1959 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */1960 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */1969 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */1970 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */1976 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */1977 <STM32_PINMUX('Z', 2, AF5)>; /* SPI1_MOSI */1984 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
294 gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
212 btst r0, STATUS_DE_BIT ; Z flag set if bit clear223 btst r0, STATUS_U_BIT ; Z flag set if K (Z clear for U)
186 #define AXR(A, B, C, D, K, L, M, N, V, W, Y, Z, S) \ argument194 xor X(Z), X(D); \198 rotl X(Z), S;
32 #define request_region(X, Y, Z) (1) argument
335 gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;354 gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
741 # save the zero result to the register file and set the 'Z' ccode bit.749 mov.w %d4,%cc # set 'Z' ccode bit905 # (1) save 'Z' bit from (Rn - lo)906 # (2) save 'Z' and 'N' bits from ((hi - lo) - (Rn - hi))913 andi.b &0x4, %d3 # keep 'Z' bit919 andi.b &0x5, %d3 # keep 'Z' and 'N'
472 set nzi_mask, 0x01ffffff #clears N, Z, and I6413 #--X'+X'*Y*( [C1+Z*(C3+Z*C5)] + [Y*(C2+Z*C4)] ), Z = Y*Y.6427 fmul.x %fp1,%fp1 # FP1 IS Z = Y*Y6432 fmul.x %fp1,%fp3 # Z*C56433 fmul.x %fp1,%fp2 # Z*B46435 fadd.d ATANC3(%pc),%fp3 # C3+Z*C56436 fadd.d ATANC2(%pc),%fp2 # C2+Z*C46438 fmul.x %fp3,%fp1 # Z*(C3+Z*C5), FP3 RELEASED6439 fmul.x %fp0,%fp2 # Y*(C2+Z*C4)6441 fadd.d ATANC1(%pc),%fp1 # C1+Z*(C3+Z*C5)[all …]
6459 #--WHICH IS X + X*Y*( [B1+Z*(B3+Z*B5)] + [Y*(B2+Z*(B4+Z*B6)] )6460 #--WHERE Y = X*X, AND Z = Y*Y.6471 fmul.x %fp1,%fp1 # FP1 IS Z = Y*Y6476 fmul.x %fp1,%fp2 # Z*B66477 fmul.x %fp1,%fp3 # Z*B56479 fadd.d ATANB4(%pc),%fp2 # B4+Z*B66480 fadd.d ATANB3(%pc),%fp3 # B3+Z*B56482 fmul.x %fp1,%fp2 # Z*(B4+Z*B6)6483 fmul.x %fp3,%fp1 # Z*(B3+Z*B5)6485 fadd.d ATANB2(%pc),%fp2 # B2+Z*(B4+Z*B6)[all …]
394 ; Set Z flag if exception in U mode. Hardware micro-ops do this on any397 ; EXCEPTION_PROLOGUE called in slow path, relies on correct Z flag set
25 #define request_region(X, Y, Z) (1) argument
476 orr r0, r0, r6 @ ..VI Z..S .... .C.M (mmu)477 @ ...I Z..S .... .... (uc)