| /arch/m68k/coldfire/ |
| D | intc-5272.c | 41 unsigned char ack; member
45 /*MCF_IRQ_SPURIOUS*/ { .icr = 0, .index = 0, .ack = 0, },
46 /*MCF_IRQ_EINT1*/ { .icr = MCFSIM_ICR1, .index = 28, .ack = 1, },
47 /*MCF_IRQ_EINT2*/ { .icr = MCFSIM_ICR1, .index = 24, .ack = 1, },
48 /*MCF_IRQ_EINT3*/ { .icr = MCFSIM_ICR1, .index = 20, .ack = 1, },
49 /*MCF_IRQ_EINT4*/ { .icr = MCFSIM_ICR1, .index = 16, .ack = 1, },
50 /*MCF_IRQ_TIMER1*/ { .icr = MCFSIM_ICR1, .index = 12, .ack = 0, },
51 /*MCF_IRQ_TIMER2*/ { .icr = MCFSIM_ICR1, .index = 8, .ack = 0, },
52 /*MCF_IRQ_TIMER3*/ { .icr = MCFSIM_ICR1, .index = 4, .ack = 0, },
53 /*MCF_IRQ_TIMER4*/ { .icr = MCFSIM_ICR1, .index = 0, .ack = 0, },
[all …]
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| /arch/powerpc/kernel/ |
| D | smp-tbsync.c | 31 volatile int ack; member
57 tbsync->ack = 1; in smp_generic_take_timebase()
65 tbsync->ack = 0; in smp_generic_take_timebase()
95 while (tbsync->ack) in start_contest()
103 while (!tbsync->ack) in start_contest()
124 while (!tbsync->ack) in smp_generic_give_timebase()
165 while (tbsync->ack) in smp_generic_give_timebase()
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| /arch/powerpc/platforms/cell/ |
| D | interrupt.c | 96 unsigned long bits, ack; in iic_ioexc_cascade() local
104 ack = bits & IIC_ISR_EDGE_MASK; in iic_ioexc_cascade()
105 if (ack) in iic_ioexc_cascade()
106 out_be64(&node_iic->iic_is, ack); in iic_ioexc_cascade()
117 ack = bits & ~IIC_ISR_EDGE_MASK; in iic_ioexc_cascade()
118 if (ack) in iic_ioexc_cascade()
119 out_be64(&node_iic->iic_is, ack); in iic_ioexc_cascade()
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| /arch/powerpc/sysdev/ |
| D | ipic.c | 146 .ack = IPIC_SEPNR,
154 .ack = IPIC_SEPNR,
162 .ack = IPIC_SEPNR,
170 .ack = IPIC_SEPNR,
178 .ack = IPIC_SEPNR,
186 .ack = IPIC_SEPNR,
194 .ack = IPIC_SEPNR,
314 .ack = IPIC_SEPNR,
566 ipic_write(ipic->regs, ipic_info[src].ack, temp); in ipic_ack_irq()
589 ipic_write(ipic->regs, ipic_info[src].ack, temp); in ipic_mask_irq_and_ack()
[all …]
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| D | ipic.h | 46 u8 ack; /* pending register offset from base if the irq member
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| /arch/powerpc/platforms/powermac/ |
| D | pic.c | 39 unsigned int ack; member
86 out_le32(&pmac_irq_hw[i]->ack, bit); in pmac_mask_and_ack_irq()
106 out_le32(&pmac_irq_hw[i]->ack, bit); in pmac_ack_irq()
107 (void)in_le32(&pmac_irq_hw[i]->ack); in pmac_ack_irq()
150 out_le32(&pmac_irq_hw[i]->ack, bit); in pmac_startup_irq()
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| D | low_i2c.c | 242 u8 ack; in kw_i2c_handle_interrupt() local
261 ack = kw_read_reg(reg_status); in kw_i2c_handle_interrupt()
262 if (ack & KW_I2C_STAT_BUSY) in kw_i2c_handle_interrupt()
272 ack = kw_read_reg(reg_status); in kw_i2c_handle_interrupt()
277 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { in kw_i2c_handle_interrupt()
308 ack = kw_read_reg(reg_status); in kw_i2c_handle_interrupt()
309 if ((ack & KW_I2C_STAT_LAST_AAK) == 0) { in kw_i2c_handle_interrupt()
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| /arch/powerpc/kvm/ |
| D | book3s_xive_template.c | 17 u16 ack; in GLUE() local
26 ack = be16_to_cpu(__x_readw(__x_tima + TM_SPC_ACK_OS_REG)); in GLUE()
34 if (!((ack >> 8) & TM_QW1_NSR_EO)) in GLUE()
38 cppr = ack & 0xff; in GLUE()
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| /arch/x86/events/zhaoxin/ |
| D | core.c | 274 static inline void zhaoxin_pmu_ack_status(u64 ack) in zhaoxin_pmu_ack_status() argument
276 wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack); in zhaoxin_pmu_ack_status()
279 static inline void zxc_pmu_ack_status(u64 ack) in zxc_pmu_ack_status() argument
285 zhaoxin_pmu_ack_status(ack); in zxc_pmu_ack_status()
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| /arch/x86/events/intel/ |
| D | knc.c | 208 static inline void knc_pmu_ack_status(u64 ack) in knc_pmu_ack_status() argument
210 wrmsrl(MSR_KNC_IA32_PERF_GLOBAL_OVF_CONTROL, ack); in knc_pmu_ack_status()
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| /arch/sparc/kernel/ |
| D | leon_pci_grpci2.c | 505 int i, ack = 0; in grpci2_pci_flow_irq() local
514 ack = 1; in grpci2_pci_flow_irq()
525 ack = 1; in grpci2_pci_flow_irq()
535 ack = 1; in grpci2_pci_flow_irq()
543 if (ack) in grpci2_pci_flow_irq()
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| D | leon_pci_grpci1.c | 364 int i, ack = 0; in grpci1_pci_flow_irq() local
373 ack = 1; in grpci1_pci_flow_irq()
383 ack = 1; in grpci1_pci_flow_irq()
391 if (ack) in grpci1_pci_flow_irq()
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| /arch/powerpc/sysdev/xive/ |
| D | spapr.c | 592 u16 ack; in xive_spapr_update_pending() local
601 ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_OS_REG)); in xive_spapr_update_pending()
610 cppr = ack & 0xff; in xive_spapr_update_pending()
611 nsr = ack >> 8; in xive_spapr_update_pending()
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| D | native.c | 345 u16 ack; in xive_native_update_pending() local
348 ack = be16_to_cpu(__raw_readw(xive_tima + TM_SPC_ACK_HV_REG)); in xive_native_update_pending()
357 cppr = ack & 0xff; in xive_native_update_pending()
358 he = (ack >> 8) >> 6; in xive_native_update_pending()
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| /arch/mips/include/asm/sn/sn0/ |
| D | hubio.h | 543 ack: 1, /* indicates data ack received */ member
591 ack: 1, /* indicates data ack received */ member
890 ack: 1, /* 17: Data ack received. */ member
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| /arch/arm/mach-omap2/ |
| D | prm44xx.c | 46 .ack = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
229 i * 4, omap4_prcm_irq_setup.ack + i * 4); in omap44xx_prm_read_pending_irqs()
824 omap4_prcm_irq_setup.ack = AM43XX_PRM_IRQSTATUS_MPU_OFFSET; in omap44xx_prm_init()
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| D | prm_common.c | 330 ct->regs.ack = irq_setup->ack + i * 4; in omap_prcm_register_chain_handler()
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| D | prcm-common.h | 499 u16 ack; member
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| D | prm3xxx.c | 42 .ack = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
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| /arch/mips/include/asm/octeon/ |
| D | cvmx-pcsx-defs.h | 393 uint64_t ack:1; member
407 uint64_t ack:1;
748 uint64_t ack:1; member
760 uint64_t ack:1;
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| /arch/arm/mach-imx/ |
| D | avic.c | 142 ct->regs.ack = ct->regs.mask; in avic_init_gc()
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| /arch/arm64/boot/dts/qcom/ |
| D | sm8150.dtsi | 583 "handover", "stop-ack";
769 "stop-ack", "shutdown-ack";
802 "handover", "stop-ack";
1000 "handover", "stop-ack";
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| /arch/arm/boot/dts/ |
| D | qcom-msm8960.dtsi | 152 interrupt-names = "ack", "err", "wakeup";
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| /arch/sparc/include/asm/ |
| D | vio.h | 111 u8 ack; member
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| /arch/arm/mach-omap1/ |
| D | ams-delta-fiq-handler.S | 130 str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts
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