| /arch/arm/mach-omap2/ |
| D | powerdomains7xx_data.c | 37 .banks = 4,
78 .banks = 2,
92 .banks = 1,
105 .banks = 2,
119 .banks = 1,
132 .banks = 1,
144 .banks = 5,
170 .banks = 1,
186 .banks = 1,
201 .banks = 1,
[all …]
|
| D | powerdomains44xx_data.c | 38 .banks = 5,
63 .banks = 1,
81 .banks = 2,
101 .banks = 1,
119 .banks = 3,
140 .banks = 1,
157 .banks = 1,
174 .banks = 1,
190 .banks = 1,
207 .banks = 3,
[all …]
|
| D | powerdomains54xx_data.c | 36 .banks = 5,
62 .banks = 2,
91 .banks = 1,
109 .banks = 1,
126 .banks = 1,
142 .banks = 1,
159 .banks = 2,
188 .banks = 3,
209 .banks = 1,
227 .banks = 2,
[all …]
|
| D | powerdomains3xxx_data.c | 37 .banks = 4,
59 .banks = 1,
75 .banks = 1,
100 .banks = 2,
122 .banks = 2,
139 .banks = 2,
156 .banks = 1,
171 .banks = 1,
192 .banks = 1,
207 .banks = 1,
[all …]
|
| D | powerdomains2xxx_data.c | 31 .banks = 1,
46 .banks = 1,
61 .banks = 3,
87 .banks = 1,
|
| D | powerdomains43xx_data.c | 23 .banks = 1,
37 .banks = 3,
65 .banks = 1,
95 .banks = 4,
|
| D | powerdomains33xx_data.c | 33 .banks = 1,
84 .banks = 3,
127 .banks = 3,
|
| D | powerdomain.c | 129 for (i = 0; i < pwrdm->banks; i++) in _pwrdm_register()
152 for (i = 0; i < pwrdm->banks; i++) { in _update_logic_membank_counters()
515 return pwrdm->banks; in pwrdm_get_mem_bank_count()
672 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_onst()
710 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_retst()
806 if (pwrdm->banks < (bank + 1)) in pwrdm_read_mem_pwrst()
836 if (pwrdm->banks < (bank + 1)) in pwrdm_read_prev_mem_pwrst()
865 if (pwrdm->banks < (bank + 1)) in pwrdm_read_mem_retst()
1171 for (i = 0; i < pwrdm->banks; i++) in pwrdm_get_context_loss_count()
1215 for (i = 0; i < pwrdm->banks; i++) in pwrdm_can_ever_lose_context()
[all …]
|
| D | powerdomains2xxx_3xxx_data.c | 47 .banks = 1,
|
| D | pm-debug.c | 103 for (i = 0; i < pwrdm->banks; i++) in pwrdm_dbg_show_counter()
|
| D | powerdomain.h | 119 const u8 banks; member
|
| /arch/x86/kernel/cpu/mce/ |
| D | intel.c | 76 static int cmci_supported(int *banks) in cmci_supported() argument
95 *banks = min_t(unsigned, MAX_NR_BANKS, cap & 0xff); in cmci_supported()
267 static void cmci_discover(int banks) in cmci_discover() argument
275 for (i = 0; i < banks; i++) { in cmci_discover()
345 int banks; in cmci_recheck() local
347 if (!mce_available(raw_cpu_ptr(&cpu_info)) || !cmci_supported(&banks)) in cmci_recheck()
376 int banks; in cmci_clear() local
378 if (!cmci_supported(&banks)) in cmci_clear()
381 for (i = 0; i < banks; i++) in cmci_clear()
388 int banks; in cmci_rediscover_work_func() local
[all …]
|
| /arch/arm64/boot/dts/amlogic/ |
| D | meson-sm1-khadas-vim3l-android.dts | 94 sensorhub,flash-banks = <0 0x08000000 0x04000>,
100 sensorhub,num-flash-banks = <6>;
118 sensorhub,num-flash-banks = <4>;
119 sensorhub,flash-banks = <0 0x08000000 0x04000>,
124 sensorhub,num-shared-flash-banks = <6>;
125 sensorhub,shared-flash-banks = <6 0x08040000 0x20000>,
|
| /arch/mips/bcm63xx/ |
| D | cpu.c | 258 unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; in detect_memory_size() local
274 banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; in detect_memory_size()
282 banks = 2; in detect_memory_size()
291 return 1 << (cols + rows + (is_32bits + 1) + banks); in detect_memory_size()
|
| /arch/mips/sgi-ip27/ |
| D | ip27-memory.c | 239 klmembnk_t *banks; in slot_psize_compute() local
248 banks = (klmembnk_t *) find_first_component(brd, KLSTRUCT_MEMBNK); in slot_psize_compute()
249 if (!banks) in slot_psize_compute()
253 size = (unsigned long)banks->membnk_bnksz[slot/4]; in slot_psize_compute()
|
| /arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-board-base.dtsi | 22 &memory { /* Default DRAM banks */
|
| /arch/x86/boot/ |
| D | vesa.h | 44 u8 banks; /* 26 */ member
|
| /arch/arm/kernel/ |
| D | tcm.c | 111 static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, in setup_tcm_bank() argument
124 if (banks > 1) in setup_tcm_bank()
|
| /arch/arm/boot/dts/ |
| D | s3c2416-pinctrl.dtsi | 12 * Pin banks
|
| D | bcm283x.dtsi | 111 * The GPIO IP block is designed for 3 banks of GPIOs.
115 * Since the BCM2835 only has 2 banks, the 2nd bank
|
| D | s3c64xx-pinctrl.dtsi | 8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
16 * Pin banks
|
| D | atlas7.dtsi | 1449 gpio-banks = <2>;
1576 gpio-banks = <4>;
1864 gpio-banks = <1>;
|
| /arch/sh/ |
| D | Kconfig.cpu | 88 See <file:Documentation/sh/register-banks.rst> for further
|
| /arch/mips/include/asm/sibyte/ |
| D | bcm1480_regs.h | 152 #define A_BCM1480_L2_WAY_ENABLE(A, banks) (A | (((~(banks))&0x0F) << 8)) argument
|
| /arch/arm/mach-s3c/ |
| D | Kconfig | 56 int "Space between gpio banks"
|