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/arch/x86/include/asm/
Dcpufeature.h54 #define test_cpu_cap(c, bit) \ argument
55 arch_test_bit(bit, (unsigned long *)((c)->x86_capability))
64 #define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \ argument
65 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
124 #define cpu_has(c, bit) \ argument
125 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
126 test_cpu_cap(c, bit))
128 #define this_cpu_has(bit) \ argument
129 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
130 x86_this_cpu_test_bit(bit, \
[all …]
/arch/nios2/include/asm/
Dasm-macros.h78 .macro BT reg1, reg2, bit
79 .if \bit > 31
82 .if \bit < 16
83 andi \reg1, \reg2, (1 << \bit)
85 andhi \reg1, \reg2, (1 << (\bit - 16))
97 .macro BTBZ reg1, reg2, bit, label
98 BT \reg1, \reg2, \bit
109 .macro BTBNZ reg1, reg2, bit, label
110 BT \reg1, \reg2, \bit
121 .macro BTC reg1, reg2, bit
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/arch/sh/boards/mach-x3proto/
Dilsel.c46 static inline unsigned int ilsel_offset(unsigned int bit) in ilsel_offset() argument
48 return ILSEL_LEVELS - bit - 1; in ilsel_offset()
51 static inline unsigned long mk_ilsel_addr(unsigned int bit) in mk_ilsel_addr() argument
53 return ILSEL_BASE + ((ilsel_offset(bit) >> 1) & ~0x1); in mk_ilsel_addr()
56 static inline unsigned int mk_ilsel_shift(unsigned int bit) in mk_ilsel_shift() argument
58 return (ilsel_offset(bit) & 0x3) << 2; in mk_ilsel_shift()
61 static void __ilsel_enable(ilsel_source_t set, unsigned int bit) in __ilsel_enable() argument
68 addr = mk_ilsel_addr(bit); in __ilsel_enable()
69 shift = mk_ilsel_shift(bit); in __ilsel_enable()
72 __func__, bit, addr, shift, set); in __ilsel_enable()
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/arch/x86/events/
Dprobe.c22 unsigned int bit; in perf_msr_probe() local
28 for (bit = 0; bit < cnt; bit++) { in perf_msr_probe()
29 if (!msr[bit].no_check) { in perf_msr_probe()
30 struct attribute_group *grp = msr[bit].grp; in perf_msr_probe()
39 if (!msr[bit].msr) in perf_msr_probe()
42 if (msr[bit].test && !msr[bit].test(bit, data)) in perf_msr_probe()
45 if (rdmsrl_safe(msr[bit].msr, &val)) in perf_msr_probe()
53 avail |= BIT(bit); in perf_msr_probe()
/arch/alpha/kernel/
Dsys_sable.c42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
43 void (*ack_irq_hw)(unsigned long bit);
93 sable_update_irq_hw(unsigned long bit, unsigned long mask) in sable_update_irq_hw() argument
97 if (bit >= 16) { in sable_update_irq_hw()
100 } else if (bit >= 8) { in sable_update_irq_hw()
109 sable_ack_irq_hw(unsigned long bit) in sable_ack_irq_hw() argument
113 if (bit >= 16) { in sable_ack_irq_hw()
115 val1 = 0xE0 | (bit - 16); in sable_ack_irq_hw()
117 } else if (bit >= 8) { in sable_ack_irq_hw()
119 val1 = 0xE0 | (bit - 8); in sable_ack_irq_hw()
[all …]
/arch/s390/include/asm/
Dairq.h53 void airq_iv_free(struct airq_iv *iv, unsigned long bit, unsigned long num);
62 static inline void airq_iv_free_bit(struct airq_iv *iv, unsigned long bit) in airq_iv_free_bit() argument
64 airq_iv_free(iv, bit, 1); in airq_iv_free_bit()
72 static inline void airq_iv_lock(struct airq_iv *iv, unsigned long bit) in airq_iv_lock() argument
75 bit_spin_lock(bit ^ be_to_le, iv->bitlock); in airq_iv_lock()
78 static inline void airq_iv_unlock(struct airq_iv *iv, unsigned long bit) in airq_iv_unlock() argument
81 bit_spin_unlock(bit ^ be_to_le, iv->bitlock); in airq_iv_unlock()
84 static inline void airq_iv_set_data(struct airq_iv *iv, unsigned long bit, in airq_iv_set_data() argument
87 iv->data[bit] = data; in airq_iv_set_data()
91 unsigned long bit) in airq_iv_get_data() argument
[all …]
Dctl_reg.h59 static __always_inline void __ctl_set_bit(unsigned int cr, unsigned int bit) in __ctl_set_bit() argument
64 reg |= 1UL << bit; in __ctl_set_bit()
68 static __always_inline void __ctl_clear_bit(unsigned int cr, unsigned int bit) in __ctl_clear_bit() argument
73 reg &= ~(1UL << bit); in __ctl_clear_bit()
77 void smp_ctl_set_bit(int cr, int bit);
78 void smp_ctl_clear_bit(int cr, int bit);
116 #define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit) argument
117 #define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit) argument
Dbitops.h257 #define for_each_set_bit_inv(bit, addr, size) \ argument
258 for ((bit) = find_first_bit_inv((addr), (size)); \
259 (bit) < (size); \
260 (bit) = find_next_bit_inv((addr), (size), (bit) + 1))
307 unsigned long bit = 0; in __flogr() local
313 bit += 32; in __flogr()
317 bit += 16; in __flogr()
321 bit += 8; in __flogr()
325 bit += 4; in __flogr()
329 bit += 2; in __flogr()
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/arch/arm/mach-shmobile/
Dplatsmp-apmu.c27 int bit; member
46 static int __maybe_unused apmu_power_on(void __iomem *p, int bit) in apmu_power_on() argument
49 writel_relaxed(BIT(bit), p + WUPCR_OFFS); in apmu_power_on()
58 static int __maybe_unused apmu_power_off(void __iomem *p, int bit) in apmu_power_off() argument
61 writel_relaxed(3, p + CPUNCR_OFFS(bit)); in apmu_power_off()
65 static int __maybe_unused apmu_power_off_poll(void __iomem *p, int bit) in apmu_power_off_poll() argument
70 if (CPUNST(readl_relaxed(p + PSTR_OFFS), bit) == CPUST_STANDBY) in apmu_power_off_poll()
83 return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL; in apmu_wrap()
185 static void apmu_init_cpu(struct resource *res, int cpu, int bit) in apmu_init_cpu() argument
193 apmu_cpus[cpu].bit = bit; in apmu_init_cpu()
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/arch/powerpc/sysdev/
Dipic.c37 .bit = 16,
44 .bit = 17,
51 .bit = 18,
58 .bit = 19,
65 .bit = 20,
72 .bit = 21,
79 .bit = 22,
86 .bit = 23,
93 .bit = 24,
100 .bit = 25,
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/arch/mips/alchemy/common/
Dirq.c290 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; in au1x_ic0_unmask() local
293 __raw_writel(1 << bit, base + IC_MASKSET); in au1x_ic0_unmask()
294 __raw_writel(1 << bit, base + IC_WAKESET); in au1x_ic0_unmask()
300 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; in au1x_ic1_unmask() local
303 __raw_writel(1 << bit, base + IC_MASKSET); in au1x_ic1_unmask()
304 __raw_writel(1 << bit, base + IC_WAKESET); in au1x_ic1_unmask()
310 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; in au1x_ic0_mask() local
313 __raw_writel(1 << bit, base + IC_MASKCLR); in au1x_ic0_mask()
314 __raw_writel(1 << bit, base + IC_WAKECLR); in au1x_ic0_mask()
320 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; in au1x_ic1_mask() local
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/arch/arm/mach-zx/
Dzx296702-pm-domain.c35 unsigned int bit; member
45 tmp &= ~BIT(zpd->bit); in normal_power_off()
50 tmp &= ~BIT(zpd->bit); in normal_power_off()
51 writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_ISOEN); in normal_power_off()
55 tmp &= ~BIT(zpd->bit); in normal_power_off()
60 tmp &= ~BIT(zpd->bit); in normal_power_off()
61 writel_relaxed(tmp | BIT(zpd->bit), pcubase + PCU_DM_PWRDN); in normal_power_off()
63 tmp = readl_relaxed(pcubase + PCU_DM_ACK_SYNC) & BIT(zpd->bit); in normal_power_off()
81 tmp &= ~BIT(zpd->bit); in normal_power_on()
84 tmp = readl_relaxed(pcubase + PCU_DM_ACK_SYNC) & BIT(zpd->bit); in normal_power_on()
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/arch/mips/loongson32/common/
Dirq.c25 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_ack() local
29 | (1 << bit), LS1X_INTC_INTCLR(n)); in ls1x_irq_ack()
34 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_mask() local
38 & ~(1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_mask()
43 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_mask_ack() local
47 & ~(1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_mask_ack()
49 | (1 << bit), LS1X_INTC_INTCLR(n)); in ls1x_irq_mask_ack()
54 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_unmask() local
58 | (1 << bit), LS1X_INTC_INTIEN(n)); in ls1x_irq_unmask()
63 unsigned int bit = (d->irq - LS1X_IRQ_BASE) & 0x1f; in ls1x_irq_settype() local
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/arch/m68k/math-emu/
Dfp_emu.h52 #define fp_set_sr(bit) ({ \ argument
53 FPDATA->fpsr |= 1 << (bit); \
132 .macro fp_set_sr bit
133 bset #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
136 .macro fp_clr_sr bit
137 bclr #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
140 .macro fp_tst_sr bit
141 btst #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
/arch/mips/include/asm/
Dbitops.h93 int bit = nr % BITS_PER_LONG; in set_bit() local
100 if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit) && (bit >= 16)) { in set_bit()
101 __bit_op(*m, __INS "%0, %3, %2, 1", "i"(bit), "r"(~0)); in set_bit()
105 __bit_op(*m, "or\t%0, %2", "ir"(BIT(bit))); in set_bit()
121 int bit = nr % BITS_PER_LONG; in clear_bit() local
128 if ((MIPS_ISA_REV >= 2) && __builtin_constant_p(bit)) { in clear_bit()
129 __bit_op(*m, __INS "%0, $0, %2, 1", "i"(bit)); in clear_bit()
133 __bit_op(*m, "and\t%0, %2", "ir"(~BIT(bit))); in clear_bit()
162 int bit = nr % BITS_PER_LONG; in change_bit() local
169 __bit_op(*m, "xor\t%0, %2", "ir"(BIT(bit))); in change_bit()
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/arch/mips/lib/
Dbitops.c24 unsigned int bit = nr % BITS_PER_LONG; in __mips_set_bit() local
28 mask = 1UL << bit; in __mips_set_bit()
45 unsigned int bit = nr % BITS_PER_LONG; in __mips_clear_bit() local
49 mask = 1UL << bit; in __mips_clear_bit()
66 unsigned int bit = nr % BITS_PER_LONG; in __mips_change_bit() local
70 mask = 1UL << bit; in __mips_change_bit()
88 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_set_bit_lock() local
93 mask = 1UL << bit; in __mips_test_and_set_bit_lock()
112 unsigned int bit = nr % BITS_PER_LONG; in __mips_test_and_clear_bit() local
117 mask = 1UL << bit; in __mips_test_and_clear_bit()
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/arch/mips/loongson2ef/common/
Dmem.c24 int bit; in prom_init_memory() local
26 bit = fls(memsize + highmemsize); in prom_init_memory()
27 if (bit != ffs(memsize + highmemsize)) in prom_init_memory()
28 bit += 20; in prom_init_memory()
30 bit = bit + 20 - 1; in prom_init_memory()
34 0x80000000ul, (1 << bit)); in prom_init_memory()
/arch/arm/boot/dts/
Domap24xx-clocks.dtsi12 ti,bit-shift = <2>;
26 ti,bit-shift = <6>;
78 ti,bit-shift = <23>;
94 ti,bit-shift = <6>;
103 ti,bit-shift = <6>;
132 ti,bit-shift = <2>;
142 ti,bit-shift = <6>;
152 ti,bit-shift = <5>;
180 ti,bit-shift = <3>;
196 ti,bit-shift = <7>;
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Domap3xxx-clocks.dtsi25 ti,bit-shift = <6>;
36 ti,bit-shift = <7>;
85 ti,bit-shift = <4>;
99 ti,bit-shift = <2>;
113 ti,bit-shift = <6>;
140 ti,bit-shift = <2>;
221 ti,bit-shift = <0x1b>;
223 ti,set-bit-to-disable;
245 ti,bit-shift = <16>;
263 ti,bit-shift = <0xc>;
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Domap2430-clocks.dtsi26 ti,bit-shift = <2>;
40 ti,bit-shift = <4>;
56 ti,bit-shift = <0>;
64 ti,bit-shift = <5>;
80 ti,bit-shift = <0>;
102 ti,bit-shift = <1>;
110 ti,bit-shift = <3>;
118 ti,bit-shift = <3>;
126 ti,bit-shift = <4>;
134 ti,bit-shift = <4>;
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/arch/arm/include/asm/
Dbitops.h36 static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_set_bit() argument
39 unsigned long mask = BIT_MASK(bit); in ____atomic_set_bit()
41 p += BIT_WORD(bit); in ____atomic_set_bit()
48 static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_clear_bit() argument
51 unsigned long mask = BIT_MASK(bit); in ____atomic_clear_bit()
53 p += BIT_WORD(bit); in ____atomic_clear_bit()
60 static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_change_bit() argument
63 unsigned long mask = BIT_MASK(bit); in ____atomic_change_bit()
65 p += BIT_WORD(bit); in ____atomic_change_bit()
73 ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_test_and_set_bit() argument
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/arch/xtensa/include/asm/
Dbitops.h102 static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\
105 unsigned long mask = 1UL << (bit & 31); \
107 p += bit >> 5; \
122 test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
125 unsigned long mask = 1UL << (bit & 31); \
127 p += bit >> 5; \
145 static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\
148 unsigned long mask = 1UL << (bit & 31); \
150 p += bit >> 5; \
166 test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \
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/arch/mips/include/asm/mach-au1x00/
Dgpio-au1300.h32 int bit; in au1300_gpio_get_value() local
36 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_get_value()
37 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit; in au1300_gpio_get_value()
43 unsigned long bit; in au1300_gpio_direction_input() local
48 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_direction_input()
49 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR); in au1300_gpio_direction_input()
58 unsigned long bit; in au1300_gpio_set_value() local
63 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_set_value()
64 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL in au1300_gpio_set_value()
/arch/mips/include/asm/mach-ar7/
Dar7.h154 static inline void ar7_device_enable(u32 bit) in ar7_device_enable() argument
158 writel(readl(reset_reg) | (1 << bit), reset_reg); in ar7_device_enable()
162 static inline void ar7_device_disable(u32 bit) in ar7_device_disable() argument
166 writel(readl(reset_reg) & ~(1 << bit), reset_reg); in ar7_device_disable()
170 static inline void ar7_device_reset(u32 bit) in ar7_device_reset() argument
172 ar7_device_disable(bit); in ar7_device_reset()
173 ar7_device_enable(bit); in ar7_device_reset()
176 static inline void ar7_device_on(u32 bit) in ar7_device_on() argument
179 writel(readl(power_reg) | (1 << bit), power_reg); in ar7_device_on()
183 static inline void ar7_device_off(u32 bit) in ar7_device_off() argument
[all …]
/arch/ia64/include/asm/
Dbitops.h42 __u32 bit, old, new; in set_bit() local
47 bit = 1 << (nr & 31); in set_bit()
51 new = old | bit; in set_bit()
164 __u32 bit, old, new; in change_bit() local
169 bit = (1 << (nr & 31)); in change_bit()
173 new = old ^ bit; in change_bit()
203 __u32 bit, old, new; in test_and_set_bit() local
208 bit = 1 << (nr & 31); in test_and_set_bit()
212 new = old | bit; in test_and_set_bit()
214 return (old & bit) != 0; in test_and_set_bit()
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