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Searched refs:bts (Results 1 – 12 of 12) sorted by relevance

/arch/x86/events/intel/
Dbts.c183 static void bts_update(struct bts_ctx *bts) in bts_update() argument
187 struct bts_buffer *buf = perf_get_aux(&bts->handle); in bts_update()
201 perf_aux_output_flag(&bts->handle, in bts_update()
228 struct bts_ctx *bts = this_cpu_ptr(&bts_ctx); in __bts_event_start() local
229 struct bts_buffer *buf = perf_get_aux(&bts->handle); in __bts_event_start()
248 WRITE_ONCE(bts->state, BTS_STATE_ACTIVE); in __bts_event_start()
257 struct bts_ctx *bts = this_cpu_ptr(&bts_ctx); in bts_event_start() local
260 buf = perf_aux_output_begin(&bts->handle, event); in bts_event_start()
264 if (bts_buffer_reset(buf, &bts->handle)) in bts_event_start()
267 bts->ds_back.bts_buffer_base = cpuc->ds->bts_buffer_base; in bts_event_start()
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DMakefile2 obj-$(CONFIG_CPU_SUP_INTEL) += core.o bts.o
Dds.c398 if (!x86_pmu.bts) in alloc_bts_buffer()
425 if (!x86_pmu.bts) in release_bts_buffer()
453 if (!x86_pmu.bts && !x86_pmu.pebs) in release_ds_buffers()
482 if (!x86_pmu.bts && !x86_pmu.pebs) in reserve_ds_buffers()
485 if (!x86_pmu.bts) in reserve_ds_buffers()
521 if (x86_pmu.bts && !bts_err) in reserve_ds_buffers()
2026 x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS); in intel_ds_init()
2115 if (!x86_pmu.bts && !x86_pmu.pebs) in perf_restore_debug_store()
Dcore.c2727 bool bts = false; in intel_pmu_handle_irq_v4() local
2735 bts = true; in intel_pmu_handle_irq_v4()
2786 if (bts) in intel_pmu_handle_irq_v4()
/arch/x86/include/asm/
Dsync_bitops.h34 asm volatile("lock; " __ASM_SIZE(bts) " %1,%0" in sync_set_bit()
85 return GEN_BINARY_RMWcc("lock; " __ASM_SIZE(bts), *addr, c, "Ir", nr); in sync_test_and_set_bit()
Dbitops.h60 asm volatile(LOCK_PREFIX __ASM_SIZE(bts) " %1,%0" in arch_set_bit()
68 asm volatile(__ASM_SIZE(bts) " %1,%0" : : ADDR, "Ir" (nr) : "memory"); in arch___set_bit()
138 return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(bts), *addr, c, "Ir", nr); in arch_test_and_set_bit()
152 asm(__ASM_SIZE(bts) " %2,%1" in arch___test_and_set_bit()
/arch/x86/boot/compressed/
Dmem_encrypt.S79 bts %rax, sme_me_mask(%rip) /* Create the encryption mask */
Dhead_64.S179 bts %eax, %edx /* Set encryption mask for page tables */
/arch/x86/realmode/rm/
Dtrampoline_64.S128 bts $MSR_K8_SYSCFG_MEM_ENCRYPT_BIT, %eax
/arch/x86/entry/
Dcalling.h184 bts $X86_CR3_PCID_NOFLUSH_BIT, \reg
/arch/x86/events/
Dperf_event.h722 unsigned int bts :1, member
/arch/x86/kvm/
Demulate.c1075 FASTOP2W(bts);