| /arch/arm/mach-omap1/ |
| D | clock.h | 19 struct clk;
32 .clk = ck, \
45 #define __clk_get_name(clk) (clk->name) argument
46 #define __clk_get_parent(clk) (clk->parent) argument
47 #define __clk_get_rate(clk) (clk->rate) argument
68 int (*enable)(struct clk *);
69 void (*disable)(struct clk *);
70 void (*find_idlest)(struct clk *, void __iomem **,
72 void (*find_companion)(struct clk *, void __iomem **,
74 void (*allow_idle)(struct clk *);
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| D | clock.c | 31 struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p;
41 unsigned long omap1_uart_recalc(struct clk *clk) in omap1_uart_recalc() argument
43 unsigned int val = __raw_readl(clk->enable_reg); in omap1_uart_recalc()
44 return val & 1 << clk->enable_bit ? 48000000 : 12000000; in omap1_uart_recalc()
47 unsigned long omap1_sossi_recalc(struct clk *clk) in omap1_sossi_recalc() argument
54 return clk->parent->rate / div; in omap1_sossi_recalc()
57 static void omap1_clk_allow_idle(struct clk *clk) in omap1_clk_allow_idle() argument
59 struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; in omap1_clk_allow_idle()
61 if (!(clk->flags & CLOCK_IDLE_CONTROL)) in omap1_clk_allow_idle()
68 static void omap1_clk_deny_idle(struct clk *clk) in omap1_clk_deny_idle() argument
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| D | clock_data.c | 75 static struct clk ck_ref = {
81 static struct clk ck_dpll1 = {
92 .clk = {
105 static struct clk sossi_ck = {
108 .parent = &ck_dpll1out.clk,
116 static struct clk arm_ck = {
127 .clk = {
146 static struct clk arm_gpio_ck = {
157 .clk = {
170 .clk = {
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| /arch/c6x/platforms/ |
| D | pll.c | 27 static void __clk_enable(struct clk *clk) in __clk_enable() argument
29 if (clk->parent) in __clk_enable()
30 __clk_enable(clk->parent); in __clk_enable()
31 clk->usecount++; in __clk_enable()
34 static void __clk_disable(struct clk *clk) in __clk_disable() argument
36 if (WARN_ON(clk->usecount == 0)) in __clk_disable()
38 --clk->usecount; in __clk_disable()
40 if (clk->parent) in __clk_disable()
41 __clk_disable(clk->parent); in __clk_disable()
44 int clk_enable(struct clk *clk) in clk_enable() argument
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| /arch/mips/lantiq/ |
| D | clk.c | 27 static struct clk cpu_clk_generic[4];
38 struct clk *clk_get_cpu(void) in clk_get_cpu()
43 struct clk *clk_get_fpi(void) in clk_get_fpi()
49 struct clk *clk_get_io(void) in clk_get_io()
55 struct clk *clk_get_ppe(void) in clk_get_ppe()
61 static inline int clk_good(struct clk *clk) in clk_good() argument
63 return clk && !IS_ERR(clk); in clk_good()
66 unsigned long clk_get_rate(struct clk *clk) in clk_get_rate() argument
68 if (unlikely(!clk_good(clk))) in clk_get_rate()
71 if (clk->rate != 0) in clk_get_rate()
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| /arch/m68k/coldfire/ |
| D | clk.c | 31 void __clk_init_enabled(struct clk *clk) in __clk_init_enabled() argument
33 clk->enabled = 1; in __clk_init_enabled()
34 clk->clk_ops->enable(clk); in __clk_init_enabled()
37 void __clk_init_disabled(struct clk *clk) in __clk_init_disabled() argument
39 clk->enabled = 0; in __clk_init_disabled()
40 clk->clk_ops->disable(clk); in __clk_init_disabled()
43 static void __clk_enable0(struct clk *clk) in __clk_enable0() argument
45 __raw_writeb(clk->slot, MCFPM_PPMCR0); in __clk_enable0()
48 static void __clk_disable0(struct clk *clk) in __clk_disable0() argument
50 __raw_writeb(clk->slot, MCFPM_PPMSR0); in __clk_disable0()
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| /arch/mips/ralink/ |
| D | clk.c | 18 struct clk { struct
25 struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL); in ralink_clk_add() argument
27 if (!clk) in ralink_clk_add()
30 clk->cl.dev_id = dev; in ralink_clk_add()
31 clk->cl.clk = clk; in ralink_clk_add()
33 clk->rate = rate; in ralink_clk_add()
35 clkdev_add(&clk->cl); in ralink_clk_add()
41 int clk_enable(struct clk *clk) in clk_enable() argument
47 void clk_disable(struct clk *clk) in clk_disable() argument
52 unsigned long clk_get_rate(struct clk *clk) in clk_get_rate() argument
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| /arch/arm/mach-ep93xx/ |
| D | clock.c | 27 struct clk { struct
28 struct clk *parent; argument
35 unsigned long (*get_rate)(struct clk *clk); argument
36 int (*set_rate)(struct clk *clk, unsigned long rate); argument
40 static unsigned long get_uart_rate(struct clk *clk);
42 static int set_keytchclk_rate(struct clk *clk, unsigned long rate);
43 static int set_div_rate(struct clk *clk, unsigned long rate);
44 static int set_i2s_sclk_rate(struct clk *clk, unsigned long rate);
45 static int set_i2s_lrclk_rate(struct clk *clk, unsigned long rate);
47 static struct clk clk_xtali = {
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| /arch/arm/boot/dts/ |
| D | stih410-clock.dtsi | 10 clk_sysin: clk-sysin {
17 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
28 compatible = "st,stih410-clk", "simple-bus";
50 clk_m_a9: clk-m-a9@92b0000 {
62 arm_periph_clk: clk-m-a9-periphs {
75 clk_s_a0_pll: clk-s-a0-pll {
81 clock-output-names = "clk-s-a0-pll-ofd-0";
82 clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */
85 clk_s_a0_flexgen: clk-s-a0-flexgen {
93 clock-output-names = "clk-ic-lmi0",
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| D | stih418-clock.dtsi | 10 clk_sysin: clk-sysin {
17 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
28 compatible = "st,stih418-clk", "simple-bus";
50 clk_m_a9: clk-m-a9@92b0000 {
63 arm_periph_clk: clk-m-a9-periphs {
76 clk_s_a0_pll: clk-s-a0-pll {
82 clock-output-names = "clk-s-a0-pll-ofd-0";
85 clk_s_a0_flexgen: clk-s-a0-flexgen {
93 clock-output-names = "clk-ic-lmi0",
94 "clk-ic-lmi1";
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| D | stih407-clock.dtsi | 10 clk_sysin: clk-sysin {
16 clk_tmdsout_hdmi: clk-tmdsout-hdmi {
47 clk_m_a9: clk-m-a9@92b0000 {
61 arm_periph_clk: clk-m-a9-periphs {
75 clk_s_a0_pll: clk-s-a0-pll {
81 clock-output-names = "clk-s-a0-pll-ofd-0";
82 clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */
85 clk_s_a0_flexgen: clk-s-a0-flexgen {
93 clock-output-names = "clk-ic-lmi0";
98 clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 {
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| /arch/mips/lantiq/xway/ |
| D | clk.c | 57 unsigned long clk; in ltq_danube_pp32_hz() local
61 clk = CLOCK_240M; in ltq_danube_pp32_hz()
64 clk = CLOCK_222M; in ltq_danube_pp32_hz()
67 clk = CLOCK_133M; in ltq_danube_pp32_hz()
70 clk = CLOCK_266M; in ltq_danube_pp32_hz()
74 return clk; in ltq_danube_pp32_hz()
105 unsigned long clk; in ltq_vr9_cpu_hz() local
111 clk = CLOCK_600M; in ltq_vr9_cpu_hz()
114 clk = CLOCK_500M; in ltq_vr9_cpu_hz()
117 clk = CLOCK_393M; in ltq_vr9_cpu_hz()
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| D | sysctrl.c | 190 static int cgu_enable(struct clk *clk) in cgu_enable() argument
192 ltq_cgu_w32(ltq_cgu_r32(ifccr) | clk->bits, ifccr); in cgu_enable()
197 static void cgu_disable(struct clk *clk) in cgu_disable() argument
199 ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~clk->bits, ifccr); in cgu_disable()
203 static int pmu_enable(struct clk *clk) in pmu_enable() argument
209 pmu_w32(clk->bits, PWDCR_EN_XRX(clk->module)); in pmu_enable()
211 (!(pmu_r32(PWDSR_XRX(clk->module)) & clk->bits))); in pmu_enable()
215 pmu_w32(pmu_r32(PWDCR(clk->module)) & ~clk->bits, in pmu_enable()
216 PWDCR(clk->module)); in pmu_enable()
218 (pmu_r32(PWDSR(clk->module)) & clk->bits)); in pmu_enable()
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| D | gptu.c | 94 static int gptu_enable(struct clk *clk) in gptu_enable() argument
96 int ret = request_irq(irqres[clk->bits].start, timer_irq_handler, in gptu_enable()
104 GPTU_CON(clk->bits)); in gptu_enable()
105 gptu_w32(1, GPTU_RLD(clk->bits)); in gptu_enable()
106 gptu_w32(gptu_r32(GPTU_IRNEN) | BIT(clk->bits), GPTU_IRNEN); in gptu_enable()
107 gptu_w32(RUN_SEN | RUN_RL, GPTU_RUN(clk->bits)); in gptu_enable()
111 static void gptu_disable(struct clk *clk) in gptu_disable() argument
113 gptu_w32(0, GPTU_RUN(clk->bits)); in gptu_disable()
114 gptu_w32(0, GPTU_CON(clk->bits)); in gptu_disable()
115 gptu_w32(0, GPTU_RLD(clk->bits)); in gptu_disable()
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| /arch/mips/lantiq/falcon/ |
| D | sysctrl.c | 80 static inline void sysctl_wait(struct clk *clk, in sysctl_wait() argument
85 do {} while (--err && ((sysctl_r32(clk->module, reg) in sysctl_wait()
86 & clk->bits) != test)); in sysctl_wait()
89 clk->module, clk->bits, test, in sysctl_wait()
90 sysctl_r32(clk->module, reg) & clk->bits); in sysctl_wait()
93 static int sysctl_activate(struct clk *clk) in sysctl_activate() argument
95 sysctl_w32(clk->module, clk->bits, SYSCTL_CLKEN); in sysctl_activate()
96 sysctl_w32(clk->module, clk->bits, SYSCTL_ACT); in sysctl_activate()
97 sysctl_wait(clk, clk->bits, SYSCTL_ACTS); in sysctl_activate()
101 static void sysctl_deactivate(struct clk *clk) in sysctl_deactivate() argument
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| /arch/sh/kernel/cpu/sh4/ |
| D | clock-sh4-202.c | 22 static unsigned long emi_clk_recalc(struct clk *clk) in emi_clk_recalc() argument
25 return clk->parent->rate / frqcr3_divisors[idx]; in emi_clk_recalc()
28 static inline int frqcr3_lookup(struct clk *clk, unsigned long rate) in frqcr3_lookup() argument
30 int divisor = clk->parent->rate / rate; in frqcr3_lookup()
45 static struct clk sh4202_emi_clk = {
50 static unsigned long femi_clk_recalc(struct clk *clk) in femi_clk_recalc() argument
53 return clk->parent->rate / frqcr3_divisors[idx]; in femi_clk_recalc()
60 static struct clk sh4202_femi_clk = {
65 static void shoc_clk_init(struct clk *clk) in shoc_clk_init() argument
81 if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) in shoc_clk_init()
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| D | clock-sh4.c | 26 static void master_clk_init(struct clk *clk) in master_clk_init() argument
28 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007]; in master_clk_init()
35 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
38 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
45 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
48 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
55 static unsigned long cpu_clk_recalc(struct clk *clk) in cpu_clk_recalc() argument
58 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
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| /arch/mips/bcm63xx/ |
| D | clk.c | 21 struct clk { struct
22 void (*set)(struct clk *, int); argument
31 static void clk_enable_unlocked(struct clk *clk) in clk_enable_unlocked() argument
33 if (clk->set && (clk->usage++) == 0) in clk_enable_unlocked()
34 clk->set(clk, 1); in clk_enable_unlocked()
37 static void clk_disable_unlocked(struct clk *clk) in clk_disable_unlocked() argument
39 if (clk->set && (--clk->usage) == 0) in clk_disable_unlocked()
40 clk->set(clk, 0); in clk_disable_unlocked()
58 static void enet_misc_set(struct clk *clk, int enable) in enet_misc_set() argument
74 static struct clk clk_enet_misc = {
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| /arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7780.c | 22 static void master_clk_init(struct clk *clk) in master_clk_init() argument
24 clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003]; in master_clk_init()
31 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
34 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
41 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
44 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
51 static unsigned long cpu_clk_recalc(struct clk *clk) in cpu_clk_recalc() argument
54 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
74 static unsigned long shyway_clk_recalc(struct clk *clk) in shyway_clk_recalc() argument
77 return clk->parent->rate / cfc_divisors[idx]; in shyway_clk_recalc()
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| D | clock-sh7763.c | 22 static void master_clk_init(struct clk *clk) in master_clk_init() argument
24 clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07]; in master_clk_init()
31 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
34 return clk->parent->rate / p0fc_divisors[idx]; in module_clk_recalc()
41 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
44 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
68 static unsigned long shyway_clk_recalc(struct clk *clk) in shyway_clk_recalc() argument
71 return clk->parent->rate / cfc_divisors[idx]; in shyway_clk_recalc()
78 static struct clk sh7763_shyway_clk = {
87 static struct clk *sh7763_onchip_clocks[] = {
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| D | clock-sh7770.c | 19 static void master_clk_init(struct clk *clk) in master_clk_init() argument
21 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f]; in master_clk_init()
28 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
31 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
38 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
41 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
48 static unsigned long cpu_clk_recalc(struct clk *clk) in cpu_clk_recalc() argument
51 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
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| /arch/c6x/include/asm/ |
| D | clock.h | 79 struct clk { struct
86 struct clk *parent; argument
91 unsigned long (*recalc) (struct clk *); argument
92 int (*set_rate) (struct clk *clk, unsigned long rate); argument
93 int (*round_rate) (struct clk *clk, unsigned long rate); argument
113 struct clk sysclks[MAX_PLL_SYSCLKS + 1];
125 .clk = ck, \
129 extern int clk_register(struct clk *clk);
130 extern void clk_unregister(struct clk *clk);
135 extern struct clk clkin1;
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| /arch/sh/kernel/cpu/sh3/ |
| D | clock-sh7710.c | 24 static void master_clk_init(struct clk *clk) in master_clk_init() argument
26 clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007]; in master_clk_init()
33 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
36 return clk->parent->rate / md_table[idx]; in module_clk_recalc()
43 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
46 return clk->parent->rate / md_table[idx]; in bus_clk_recalc()
53 static unsigned long cpu_clk_recalc(struct clk *clk) in cpu_clk_recalc() argument
56 return clk->parent->rate / md_table[idx]; in cpu_clk_recalc()
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| D | clock-sh7705.c | 30 static void master_clk_init(struct clk *clk) in master_clk_init() argument
32 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003]; in master_clk_init()
39 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
49 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
52 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
59 static unsigned long cpu_clk_recalc(struct clk *clk) in cpu_clk_recalc() argument
62 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
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| D | clock-sh3.c | 26 static void master_clk_init(struct clk *clk) in master_clk_init() argument
31 clk->rate *= pfc_divisors[idx]; in master_clk_init()
38 static unsigned long module_clk_recalc(struct clk *clk) in module_clk_recalc() argument
43 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
50 static unsigned long bus_clk_recalc(struct clk *clk) in bus_clk_recalc() argument
55 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
62 static unsigned long cpu_clk_recalc(struct clk *clk) in cpu_clk_recalc() argument
67 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
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