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/arch/mips/netlogic/
DKconfig13 arch/mips/netlogic/dts/xlp_evp.dts
23 arch/mips/netlogic/dts/xlp_svp.dts
33 arch/mips/netlogic/dts/xlp_fvp.dts
43 arch/mips/netlogic/dts/xlp_gvp.dts
52 arch/mips/netlogic/dts/xlp_rvp.dts
/arch/arm64/boot/dts/xilinx/
Davnet-ultra96-rev1.dts3 * dts file for Avnet Ultra96 rev1
10 /dts-v1/;
12 #include "zynqmp-zcu100-revC.dts"
/arch/arm/boot/dts/
Daxm5516-amarillo.dts3 * arch/arm/boot/dts/axm5516-amarillo.dts
8 /dts-v1/;
Dat91-cosino_mega2560.dts3 * at91-cosino_mega2560.dts - Device Tree file for Cosino board with
9 * Derived from at91sam9g35ek.dts by:
14 /dts-v1/;
Dlogicpd-torpedo-37xx-devkit-28.dts3 /dts-v1/;
11 #include "logicpd-torpedo-37xx-devkit.dts"
Dstm32mp157a-avenger96.dts8 /dts-v1/;
11 #include "stm32mp157a-dhcor-avenger96.dts"
Dusb_a9g20.dts3 * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board
7 /dts-v1/;
Dsun8i-r16-nintendo-super-nes-classic.dts4 /dts-v1/;
5 #include "sun8i-r16-nintendo-nes-classic.dts"
Dtny_a9260.dts3 * tny_a9260.dts - Device Tree file for Caloa TNY A9260 board
7 /dts-v1/;
Dtny_a9g20.dts3 * tny_a9g20.dts - Device Tree file for Caloa TNY A9G20 board
7 /dts-v1/;
Dwm8750-apc8750.dts3 * wm8750-apc8750.dts
9 /dts-v1/;
/arch/c6x/boot/dts/
Devmc6457.dts3 * arch/c6x/boot/dts/evmc6457.dts
12 /dts-v1/;
Devmc6474.dts3 * arch/c6x/boot/dts/evmc6474.dts
12 /dts-v1/;
Ddsk6455.dts3 * arch/c6x/boot/dts/dsk6455.dts
11 /dts-v1/;
Devmc6472.dts3 * arch/c6x/boot/dts/evmc6472.dts
12 /dts-v1/;
Devmc6678.dts3 * arch/c6x/boot/dts/evmc6678.dts
12 /dts-v1/;
/arch/powerpc/boot/dts/fsl/
Dp1020rdb-pc_camp_core0.dts5 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
7 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
10 * Please note to add "-b 0" for core0's dts compiling.
15 /include/ "p1020rdb-pc_32b.dts"
DMakefile4 dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
Dmpc8572ds_camp_core1.dts5 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
7 * This dts allows core1 to have l2, dma2, eth2, eth3, pci2, msi.
9 * Please note to add "-b 1" for core1's dts compiling.
14 /include/ "mpc8572ds.dts"
/arch/csky/boot/dts/
DMakefile4 dtb-y := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
/arch/powerpc/boot/dts/
DMakefile6 dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
/arch/nios2/boot/dts/
DMakefile6 dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
/arch/xtensa/boot/dts/
DMakefile17 dtb- := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))
/arch/mips/boot/dts/ingenic/
Dgcw0_proto.dts2 /dts-v1/;
4 #include "gcw0.dts"
/arch/arc/boot/dts/
DMakefile14 dtb- := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts))

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