| /arch/mips/cavium-octeon/ |
| D | octeon-platform.c | 481 static void __init octeon_fdt_set_phy(int eth, int phy_addr) in octeon_fdt_set_phy() argument
493 phy_handle = fdt_getprop(initial_boot_params, eth, "phy-handle", NULL); in octeon_fdt_set_phy()
500 alt_phy_handle = fdt_getprop(initial_boot_params, eth, "cavium,alt-phy-handle", NULL); in octeon_fdt_set_phy()
511 fdt_nop_property(initial_boot_params, eth, "phy-handle"); in octeon_fdt_set_phy()
513 fdt_nop_property(initial_boot_params, eth, "cavium,alt-phy-handle"); in octeon_fdt_set_phy()
527 phy_prop = fdt_get_property(initial_boot_params, eth, "phy-handle", NULL); in octeon_fdt_set_phy()
530 fdt_nop_property(initial_boot_params, eth, "phy-handle"); in octeon_fdt_set_phy()
531 alt_prop = fdt_get_property_w(initial_boot_params, eth, "cavium,alt-phy-handle", NULL); in octeon_fdt_set_phy()
609 static void __init _octeon_rx_tx_delay(int eth, int rx_delay, int tx_delay) in _octeon_rx_tx_delay() argument
611 fdt_setprop_inplace_cell(initial_boot_params, eth, "rx-delay", in _octeon_rx_tx_delay()
[all …]
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| /arch/xtensa/platforms/xtfpga/ |
| D | setup.c | 132 struct device_node *eth = NULL; in machine_setup() local
134 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc"))) in machine_setup()
135 update_local_mac(eth); in machine_setup()
136 of_node_put(eth); in machine_setup()
|
| /arch/arm/boot/dts/ |
| D | mt7629-rfb.dts | 63 ð {
70 compatible = "mediatek,eth-mac";
81 compatible = "mediatek,eth-mac";
153 eth_pins: eth-pins {
155 function = "eth";
|
| D | uniphier-pro4-sanji.dts | 28 ethernet0 = ð
79 ð {
|
| D | uniphier-pro4-ace.dts | 29 ethernet0 = ð
84 ð {
|
| D | uniphier-ld6b-ref.dts | 33 ethernet0 = ð
78 ð {
|
| D | uniphier-pro4-ref.dts | 32 ethernet0 = ð
85 ð {
|
| D | uniphier-pxs2-gentil.dts | 29 ethernet0 = ð
84 ð {
|
| D | uniphier-pxs2-vodka.dts | 27 ethernet0 = ð
85 ð {
|
| D | imx1-apf9328.dts | 57 eth: eth@4,c00000 { label
|
| D | mt7623a.dtsi | 20 ð {
|
| D | orion5x.dtsi | 180 eth: ethernet-controller@72000 { label
181 compatible = "marvell,orion-eth";
189 compatible = "marvell,orion-eth-port";
|
| D | spear1310.dtsi | 137 gmac1: eth@5c400000 {
146 gmac2: eth@5c500000 {
155 gmac3: eth@5c600000 {
164 gmac4: eth@5c700000 {
|
| D | mt7623n-rfb-emmc.dts | 159 ð {
163 compatible = "mediatek,eth-mac";
175 compatible = "mediatek,eth-mac";
|
| /arch/um/drivers/ |
| D | net_kern.c | 546 static int check_transport(struct transport *transport, char *eth, int n, in check_transport() argument
552 if (strncmp(eth, transport->name, len)) in check_transport()
555 eth += len; in check_transport()
556 if (*eth == ',') in check_transport()
557 eth++; in check_transport()
558 else if (*eth != '\0') in check_transport()
565 if (!transport->setup(eth, mac_out, *init_out)) { in check_transport()
575 struct eth_init *eth; in register_transport() local
586 eth = list_entry(ele, struct eth_init, list); in register_transport()
587 match = check_transport(new, eth->init, eth->index, &init, in register_transport()
[all …]
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| /arch/arm64/boot/dts/socionext/ |
| D | uniphier-ld11-ref.dts | 32 ethernet0 = ð
77 ð {
|
| D | uniphier-ld20-ref.dts | 32 ethernet0 = ð
65 ð {
|
| D | uniphier-ld20-akebi96.dts | 38 ethernet0 = ð
150 ð {
|
| D | uniphier-ld20-global.dts | 33 ethernet0 = ð
136 ð {
|
| D | uniphier-ld11-global.dts | 33 ethernet0 = ð
154 ð {
|
| /arch/mips/boot/dts/qca/ |
| D | ar9331.dtsi | 120 compatible = "qca,ar9330-eth";
127 clock-names = "eth", "mdio";
136 compatible = "qca,ar9330-eth";
142 clock-names = "eth", "mdio";
|
| /arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-zcu102-rev1.0.dts | 25 eth_mac: eth-mac@20 {
|
| /arch/arm64/boot/dts/broadcom/stingray/ |
| D | stingray-board-base.dtsi | 47 gphy0: eth-phy@10 {
|
| /arch/arm64/boot/dts/mediatek/ |
| D | mt7622-bananapi-bpi-r64.dts | 117 ð {
120 compatible = "mediatek,eth-mac";
132 compatible = "mediatek,eth-mac";
331 eth_pins: eth-pins {
333 function = "eth";
|
| /arch/mips/boot/dts/ralink/ |
| D | gardena_smart_gateway_mt7688.dts | 105 label = "smartgw:eth:link";
111 label = "smartgw:eth:act";
|