| /arch/ia64/include/asm/ |
| D | cacheflush.h | 21 extern void flush_icache_range(unsigned long start, unsigned long end);
22 #define flush_icache_range flush_icache_range macro
28 flush_icache_range(_addr, _addr + (len)); \
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| D | kexec.h | 21 flush_icache_range(page_addr, page_addr + PAGE_SIZE); \
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| /arch/hexagon/include/asm/ |
| D | cacheflush.h | 37 extern void flush_icache_range(unsigned long start, unsigned long end);
38 #define flush_icache_range flush_icache_range macro
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| /arch/arm64/include/asm/ |
| D | cacheflush.h | 74 static inline void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function
97 #define flush_icache_range flush_icache_range macro
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| /arch/arc/kernel/ |
| D | kprobes.c | 41 flush_icache_range((unsigned long)p->addr, in arch_arm_kprobe()
49 flush_icache_range((unsigned long)p->addr, in arch_disarm_kprobe()
61 flush_icache_range((unsigned long)p->ainsn.t1_addr, in arch_remove_kprobe()
71 flush_icache_range((unsigned long)p->ainsn.t2_addr, in arch_remove_kprobe()
105 flush_icache_range((unsigned long)p->ainsn.t1_addr, in resume_execution()
115 flush_icache_range((unsigned long)p->ainsn.t2_addr, in resume_execution()
138 flush_icache_range((unsigned long)p->addr, in setup_singlestep()
178 flush_icache_range((unsigned long)p->ainsn.t1_addr, in setup_singlestep()
187 flush_icache_range((unsigned long)p->ainsn.t2_addr, in setup_singlestep()
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| /arch/nds32/include/asm/ |
| D | cacheflush.h | 11 void flush_icache_range(unsigned long start, unsigned long end);
12 #define flush_icache_range flush_icache_range macro
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| /arch/xtensa/include/asm/ |
| D | cacheflush.h | 100 void flush_icache_range(unsigned long start, unsigned long end);
106 #define flush_icache_range local_flush_icache_range macro
142 #define flush_icache_range local_flush_icache_range macro
148 #define flush_icache_user_range flush_icache_range
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| /arch/powerpc/include/asm/ |
| D | cacheflush.h | 29 void flush_icache_range(unsigned long start, unsigned long stop);
30 #define flush_icache_range flush_icache_range macro
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| /arch/c6x/include/asm/ |
| D | cacheflush.h | 22 #define flush_icache_range(s, e) \ macro
40 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
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| /arch/hexagon/mm/ |
| D | cache.c | 35 void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() function
58 EXPORT_SYMBOL(flush_icache_range);
123 flush_icache_range((unsigned long) dst, in copy_to_user_page()
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| /arch/alpha/include/asm/ |
| D | cacheflush.h | 20 #define flush_icache_range(start, end) imb() macro
22 #define flush_icache_range(start, end) smp_imb() macro
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| /arch/ia64/lib/ |
| D | flush.S | 26 GLOBAL_ENTRY(flush_icache_range)
64 END(flush_icache_range)
65 EXPORT_SYMBOL_GPL(flush_icache_range)
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| /arch/mips/pistachio/ |
| D | init.c | 92 flush_icache_range((unsigned long)base, in mips_nmi_setup()
105 flush_icache_range((unsigned long)base, in mips_ejtag_setup()
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| /arch/m68k/mm/ |
| D | cache.c | 108 void flush_icache_range(unsigned long address, unsigned long endaddr) in flush_icache_range() function
116 EXPORT_SYMBOL(flush_icache_range);
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| /arch/arm/kernel/ |
| D | fiq.c | 101 flush_icache_range((unsigned long)base + offset, in set_fiq_handler()
103 flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length); in set_fiq_handler()
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| /arch/sh/include/asm/ |
| D | cacheflush.h | 46 extern void flush_icache_range(unsigned long start, unsigned long end);
47 #define flush_icache_user_range flush_icache_range
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| /arch/microblaze/kernel/ |
| D | ftrace.c | 57 flush_icache_range((u32)parent, (u32)parent + 4); in prepare_ftrace_return()
94 flush_icache_range(addr, addr + 4); in ftrace_modify_code()
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| /arch/mips/kernel/ |
| D | ftrace.c | 86 flush_icache_range(ip, ip + 8); in ftrace_modify_code()
111 flush_icache_range(ip, ip + 8); in ftrace_modify_code_2()
135 flush_icache_range(ip, ip + 8); in ftrace_modify_code_2r()
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| /arch/arm/include/asm/ |
| D | fncpy.h | 73 flush_icache_range((unsigned long)(dest_buf), \
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| /arch/mips/loongson2ef/common/ |
| D | init.c | 26 flush_icache_range((unsigned long)base, (unsigned long)base + 0x80); in mips_nmi_setup()
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| /arch/nios2/kernel/ |
| D | nios2_ksyms.c | 24 EXPORT_SYMBOL(flush_icache_range);
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| /arch/riscv/include/asm/ |
| D | cacheflush.h | 29 #define flush_icache_range(start, end) flush_icache_all() macro
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| /arch/m68k/include/asm/ |
| D | cacheflush_no.h | 13 #define flush_icache_range(start, len) __flush_icache_all() macro
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| /arch/ia64/kernel/ |
| D | ftrace.c | 122 flush_icache_range(ip, ip + MCOUNT_INSN_SIZE); in ftrace_modify_code()
194 flush_icache_range(addr, addr + 16); in ftrace_update_ftrace_func()
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| /arch/parisc/include/asm/ |
| D | kprobes.h | 30 flush_icache_range((unsigned long)&(p)->ainsn.insn[0], \
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