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/arch/sparc/lib/
DNGmemcpy.S179 or %o0, %i1, %i3
203 LOAD(prefetch, %i1, #one_read)
213 EX_LD(LOAD(ldub, %i1, %g1), NG_ret_i2_plus_i4_plus_1)
215 add %i1, 1, %i1
234 andcc %i1, (16 - 1), %i4
241 sub %i1, %i4, %i1
247 EX_LD(LOAD_TWIN(%i1, %g2, %g3), NG_ret_i2_plus_g1)
265 8: EX_LD(LOAD_TWIN(%i1 + %o4, %o2, %o3), NG_ret_i2_plus_g1)
267 LOAD(prefetch, %i1 + %i3, #one_read)
272 EX_LD(LOAD_TWIN(%i1 + %o5, %g2, %g3), NG_ret_i2_plus_g1_minus_16)
[all …]
Dmemcpy.S303 ldub [%i1], %g5
304 add %i1, 1, %i1
310 ldub [%i1], %g3
311 add %i1, 2, %i1
314 ldub [%i1 - 1], %g3
318 and %i1, 3, %g2
320 and %i1, -4, %i1
333 ld [%i1], %i3
335 ld [%i1 + 4], %i4
339 ld [%i1], %i4
[all …]
DNGpage.S24 prefetch [%i1 + 0x00], #one_read
25 prefetch [%i1 + 0x40], #one_read
27 1: prefetch [%i1 + 0x80], #one_read
28 prefetch [%i1 + 0xc0], #one_read
29 ldda [%i1 + 0x00] %asi, %o2
30 ldda [%i1 + 0x10] %asi, %o4
31 ldda [%i1 + 0x20] %asi, %l2
32 ldda [%i1 + 0x30] %asi, %l4
41 ldda [%i1 + 0x40] %asi, %o2
42 ldda [%i1 + 0x50] %asi, %o4
[all …]
Dxor.S263 ldda [%i1] %asi, %f0
269 add %i1, 64, %i1
298 ldda [%i1] %asi, %f0
308 stda %f48, [%i1 - 64] %asi
348 stda %f48, [%i1] %asi
360 prefetch [%i1], #n_writes
365 mov %i1, %i0
366 mov %i2, %i1
367 1: ldda [%i1 + 0x00] %asi, %i2 /* %i2/%i3 = src + 0x00 */
368 ldda [%i1 + 0x10] %asi, %i4 /* %i4/%i5 = src + 0x10 */
[all …]
Dmuldi3.S14 wr %g0, %i1, %y
16 and %i1, %g2, %g2
54 mov %i1, %o0
Ddivdi3.S18 sub %g0,%i1,%o0
24 mov %o5,%i1
41 mov %i1,%i3
258 mov %l1,%i1
261 sub %g0,%i1,%o0
267 mov %l3,%i1
Dudivdi3.S16 mov %i1,%i3
245 mov %l1,%i1
/arch/arm64/crypto/
Daes-ce.S57 .macro do_enc_Nx, de, mc, k, i0, i1, i2, i3, i4
60 .ifnb \i1
61 aes\de \i1\().16b, \k\().16b
62 aes\mc \i1\().16b, \i1\().16b
77 .macro round_Nx, enc, k, i0, i1, i2, i3, i4
79 do_enc_Nx e, mc, \k, \i0, \i1, \i2, \i3, \i4
81 do_enc_Nx d, imc, \k, \i0, \i1, \i2, \i3, \i4
86 .macro fin_round_Nx, de, k, k2, i0, i1, i2, i3, i4
88 .ifnb \i1
89 aes\de \i1\().16b, \k\().16b
[all …]
Dsha512-ce-core.S83 .macro dround, i0, i1, i2, i3, i4, rc0, rc1, in0, in1, in2, in3, in4
90 ext v7.16b, v\i1\().16b, v\i2\().16b, #8
100 add v\i4\().2d, v\i1\().2d, v\i3\().2d
101 sha512h2 q\i3, q\i1, v\i0\().2d
/arch/arm64/kvm/
Dsys_regs.h136 static inline int cmp_sys_reg(const struct sys_reg_desc *i1, in cmp_sys_reg() argument
139 BUG_ON(i1 == i2); in cmp_sys_reg()
140 if (!i1) in cmp_sys_reg()
144 if (i1->Op0 != i2->Op0) in cmp_sys_reg()
145 return i1->Op0 - i2->Op0; in cmp_sys_reg()
146 if (i1->Op1 != i2->Op1) in cmp_sys_reg()
147 return i1->Op1 - i2->Op1; in cmp_sys_reg()
148 if (i1->CRn != i2->CRn) in cmp_sys_reg()
149 return i1->CRn - i2->CRn; in cmp_sys_reg()
150 if (i1->CRm != i2->CRm) in cmp_sys_reg()
[all …]
/arch/arm/kernel/
Dinsn.c10 unsigned long s, j1, j2, i1, i2, imm10, imm11; in __arm_gen_branch_thumb2() local
21 i1 = (offset >> 23) & 0x1; in __arm_gen_branch_thumb2()
26 j1 = (!i1) ^ s; in __arm_gen_branch_thumb2()
/arch/parisc/math-emu/
Dfpudispatch.c1166 struct { u_int i1; u_int i2; } ints; member
1193 &mtmp.ints.i1,&status))
1196 &atmp.ints.i1,&atmp.ints.i1,&status))
1201 if (dbl_fmpy(&fpregs[rm1],&fpregs[rm2],&mtmp.ints.i1,
1204 if (dbl_fadd(&fpregs[ta], &fpregs[ra], &atmp.ints.i1,
1216 if (dbl_fmpy(&fpregs[rm1],&fpregs[rm2],&mtmp.ints.i1,
1219 if (dbl_fadd(&fpregs[ta], &fpregs[ra], &atmp.ints.i1,
1229 fpregs[tm] = mtmp.ints.i1;
1231 fpregs[ta] = atmp.ints.i1;
1263 if (sgl_fmpy(&fpregs[rm1],&fpregs[rm2],&mtmp.ints.i1,
[all …]
/arch/ia64/include/asm/
Dkprobes.h27 #define BRL_INST(i1, i2) ((long)((0xcL << 37) | /* brl */ \ argument
29 (((i1) & 1) << 36) | ((i2) << 13))) /* imm */
/arch/sparc/kernel/
Dsyscalls.S162 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
176 srl %i1, 0, %o1
192 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
205 mov %i1, %o1
223 srl %i1, 0, %o1 ! IEU0 Group
245 mov %i1, %o1 ! IEU1
Dwinfixup.S65 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]
82 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]
Drtrap_64.S195 LOAD_PER_CPU_BASE(%g5, %g6, %i0, %i1, %i2)
212 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
Dentry.S929 ld [%sp + STACKFRAME_SZ + PT_I1], %i1
941 mov %i1, %o1
989 mov %i1, %o1
1147 mov %i1, %o1 ! udelay_val
1161 mov %i1, %o1 ! udelay_val
Dhvcalls.S712 mov %i1, %o1
724 mov %i1, %o1
Detrap_64.S184 stx %i1, [%sp + PTREGS_OFF + PT_V9_I1]
/arch/sparc/include/asm/
Dttable.h261 stx %i1, [%sp + STACK_BIAS + 0x48]; \
282 stx %i1, [%sp + STACK_BIAS + 0x48]; \
313 stxa %i1, [%g1 + %g3] ASI; \
340 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
374 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
409 stwa %i1, [%g1 + %g3] ASI; \
439 stwa %i1, [%sp + 0x24] %asi; \
473 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
517 ldx [%sp + STACK_BIAS + 0x48], %i1; \
541 ldx [%sp + STACK_BIAS + 0x48], %i1; \
[all …]
/arch/sparc/prom/
Dcif.S40 ldx [%i1 + 0x000], %l2
/arch/powerpc/sysdev/xive/
Dcommon.c230 u32 i0, i1, idx; in xive_dump_eq() local
237 i1 = be32_to_cpup(q->qpage + idx); in xive_dump_eq()
239 q->idx, q->toggle, i0, i1); in xive_dump_eq()
1594 u32 i0, i1, idx; in xive_debug_show_cpu() local
1600 i1 = be32_to_cpup(q->qpage + idx); in xive_debug_show_cpu()
1602 q->idx, q->toggle, i0, i1); in xive_debug_show_cpu()
/arch/x86/crypto/
Dchacha-avx512vl-x86_64.S120 # o1 = i1 ^ (x1 + s1)
332 # o1 = i1 ^ (x1 + s1), first block
386 # o1 = i1 ^ (x1 + s1), third block
Dchacha-avx2-x86_64.S147 # o1 = i1 ^ (x1 + s1)
398 # o1 = i1 ^ (x1 + s1), first block
452 # o1 = i1 ^ (x1 + s1), third block
/arch/powerpc/kvm/
Dbook3s_xive.c2123 u32 i0, i1, idx; in kvmppc_xive_debug_show_queues() local
2134 i1 = be32_to_cpup(q->qpage + idx); in kvmppc_xive_debug_show_queues()
2136 i0, i1); in kvmppc_xive_debug_show_queues()

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