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Searched refs:idx (Results 1 – 25 of 329) sorted by relevance

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/arch/x86/um/
Dtls_32.c66 int idx; in get_free_idx() local
68 for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++) in get_free_idx()
69 if (!t->arch.tls_array[idx].present) in get_free_idx()
70 return idx + GDT_ENTRY_TLS_MIN; in get_free_idx()
92 int idx; in load_TLS() local
94 for (idx = GDT_ENTRY_TLS_MIN; idx < GDT_ENTRY_TLS_MAX; idx++) { in load_TLS()
96 &to->thread.arch.tls_array[idx - GDT_ENTRY_TLS_MIN]; in load_TLS()
105 curr->tls.entry_number = idx; in load_TLS()
201 int idx, int flushed) in set_tls_entry() argument
205 if (idx < GDT_ENTRY_TLS_MIN || idx > GDT_ENTRY_TLS_MAX) in set_tls_entry()
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/arch/x86/events/intel/
Duncore_nhmex.c249 if (hwc->idx == UNCORE_PMC_IDX_FIXED) in nhmex_uncore_msr_enable_event()
371 reg1->idx = 0; in nhmex_bbox_hw_config()
383 if (reg1->idx != EXTRA_REG_NONE) { in nhmex_bbox_msr_enable_event()
456 reg1->idx = 0; in nhmex_sbox_hw_config()
468 if (reg1->idx != EXTRA_REG_NONE) { in nhmex_sbox_msr_enable_event()
553 static bool nhmex_mbox_get_shared_reg(struct intel_uncore_box *box, int idx, u64 config) in nhmex_mbox_get_shared_reg() argument
560 if (idx < EXTRA_REG_NHMEX_M_ZDP_CTL_FVC) { in nhmex_mbox_get_shared_reg()
561 er = &box->shared_regs[idx]; in nhmex_mbox_get_shared_reg()
577 idx -= EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; in nhmex_mbox_get_shared_reg()
578 if (WARN_ON_ONCE(idx >= 4)) in nhmex_mbox_get_shared_reg()
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/arch/x86/kernel/
Dtls.c24 int idx; in get_free_idx() local
26 for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++) in get_free_idx()
27 if (desc_empty(&t->tls_array[idx])) in get_free_idx()
28 return idx + GDT_ENTRY_TLS_MIN; in get_free_idx()
84 static void set_tls_desc(struct task_struct *p, int idx, in set_tls_desc() argument
88 struct desc_struct *desc = &t->tls_array[idx - GDT_ENTRY_TLS_MIN]; in set_tls_desc()
114 int do_set_thread_area(struct task_struct *p, int idx, in do_set_thread_area() argument
127 if (idx == -1) in do_set_thread_area()
128 idx = info.entry_number; in do_set_thread_area()
134 if (idx == -1 && can_allocate) { in do_set_thread_area()
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/arch/arm/mm/
Dhighmem.c18 static inline void set_fixmap_pte(int idx, pte_t pte) in set_fixmap_pte() argument
20 unsigned long vaddr = __fix_to_virt(idx); in set_fixmap_pte()
36 unsigned int idx; in kmap_atomic_high_prot() local
56 idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); in kmap_atomic_high_prot()
57 vaddr = __fix_to_virt(idx); in kmap_atomic_high_prot()
70 set_fixmap_pte(idx, mk_pte(page, prot)); in kmap_atomic_high_prot()
79 int idx, type; in kunmap_atomic_high() local
83 idx = FIX_KMAP_BEGIN + type + KM_TYPE_NR * smp_processor_id(); in kunmap_atomic_high()
88 BUG_ON(vaddr != __fix_to_virt(idx)); in kunmap_atomic_high()
89 set_fixmap_pte(idx, __pte(0)); in kunmap_atomic_high()
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/arch/s390/kernel/
Dperf_regs.c11 u64 perf_reg_value(struct pt_regs *regs, int idx) in perf_reg_value() argument
15 if (idx >= PERF_REG_S390_R0 && idx <= PERF_REG_S390_R15) in perf_reg_value()
16 return regs->gprs[idx]; in perf_reg_value()
18 if (idx >= PERF_REG_S390_FP0 && idx <= PERF_REG_S390_FP15) { in perf_reg_value()
22 idx -= PERF_REG_S390_FP0; in perf_reg_value()
23 fp = MACHINE_HAS_VX ? *(freg_t *)(current->thread.fpu.vxrs + idx) in perf_reg_value()
24 : current->thread.fpu.fprs[idx]; in perf_reg_value()
28 if (idx == PERF_REG_S390_MASK) in perf_reg_value()
30 if (idx == PERF_REG_S390_PC) in perf_reg_value()
33 WARN_ON_ONCE((u32)idx >= PERF_REG_S390_MAX); in perf_reg_value()
/arch/mips/mm/
Dhighmem.c24 int idx, type; in kmap_atomic_high_prot() local
27 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_high_prot()
28 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_high_prot()
30 BUG_ON(!pte_none(*(kmap_pte - idx))); in kmap_atomic_high_prot()
32 set_pte(kmap_pte-idx, mk_pte(page, prot)); in kmap_atomic_high_prot()
50 int idx = type + KM_TYPE_NR * smp_processor_id(); in kunmap_atomic_high() local
52 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in kunmap_atomic_high()
58 pte_clear(&init_mm, vaddr, kmap_pte-idx); in kunmap_atomic_high()
73 int idx, type; in kmap_atomic_pfn() local
79 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_pfn()
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/arch/csky/mm/
Dhighmem.c25 int idx, type; in kmap_atomic_high_prot() local
28 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_high_prot()
29 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_high_prot()
31 BUG_ON(!pte_none(*(kmap_pte - idx))); in kmap_atomic_high_prot()
33 set_pte(kmap_pte-idx, mk_pte(page, prot)); in kmap_atomic_high_prot()
43 int idx; in kunmap_atomic_high() local
49 idx = KM_TYPE_NR*smp_processor_id() + kmap_atomic_idx(); in kunmap_atomic_high()
51 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in kunmap_atomic_high()
53 pte_clear(&init_mm, vaddr, kmap_pte - idx); in kunmap_atomic_high()
56 (void) idx; /* to kill a warning */ in kunmap_atomic_high()
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/arch/sh/kernel/cpu/sh3/
Dclock-sh3.c29 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
31 clk->rate *= pfc_divisors[idx]; in master_clk_init()
41 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
43 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
53 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local
55 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
67 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
81 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
83 if (idx < ARRAY_SIZE(sh3_clk_ops)) in arch_init_clk_ops()
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Dclock-sh7709.c25 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
27 clk->rate *= pfc_divisors[idx]; in master_clk_init()
37 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
39 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
49 int idx = (frqcr & 0x0080) ? in bus_clk_recalc() local
52 return clk->parent->rate * stc_multipliers[idx]; in bus_clk_recalc()
62 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
64 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
78 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
80 if (idx < ARRAY_SIZE(sh7709_clk_ops)) in arch_init_clk_ops()
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Dclock-sh7706.c25 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
27 clk->rate *= pfc_divisors[idx]; in master_clk_init()
37 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
39 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
49 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local
51 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
61 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
63 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
77 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
79 if (idx < ARRAY_SIZE(sh7706_clk_ops)) in arch_init_clk_ops()
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Dclock-sh7712.c24 int idx = (frqcr & 0x0300) >> 8; in master_clk_init() local
26 clk->rate *= multipliers[idx]; in master_clk_init()
36 int idx = frqcr & 0x0007; in module_clk_recalc() local
38 return clk->parent->rate / divisors[idx]; in module_clk_recalc()
48 int idx = (frqcr & 0x0030) >> 4; in cpu_clk_recalc() local
50 return clk->parent->rate / divisors[idx]; in cpu_clk_recalc()
63 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
65 if (idx < ARRAY_SIZE(sh7712_clk_ops)) in arch_init_clk_ops()
66 *ops = sh7712_clk_ops[idx]; in arch_init_clk_ops()
Dclock-sh7710.c35 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local
36 return clk->parent->rate / md_table[idx]; in module_clk_recalc()
45 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; in bus_clk_recalc() local
46 return clk->parent->rate / md_table[idx]; in bus_clk_recalc()
55 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; in cpu_clk_recalc() local
56 return clk->parent->rate / md_table[idx]; in cpu_clk_recalc()
70 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
72 if (idx < ARRAY_SIZE(sh7710_clk_ops)) in arch_init_clk_ops()
73 *ops = sh7710_clk_ops[idx]; in arch_init_clk_ops()
Dclock-sh7705.c41 int idx = __raw_readw(FRQCR) & 0x0003; in module_clk_recalc() local
42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
51 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8; in bus_clk_recalc() local
52 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
61 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4; in cpu_clk_recalc() local
62 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
76 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
78 if (idx < ARRAY_SIZE(sh7705_clk_ops)) in arch_init_clk_ops()
79 *ops = sh7705_clk_ops[idx]; in arch_init_clk_ops()
/arch/arm/mach-omap2/
Dcm2xxx_3xxx.h50 static inline u32 omap2_cm_read_mod_reg(s16 module, u16 idx) in omap2_cm_read_mod_reg() argument
52 return readl_relaxed(cm_base.va + module + idx); in omap2_cm_read_mod_reg()
55 static inline void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) in omap2_cm_write_mod_reg() argument
57 writel_relaxed(val, cm_base.va + module + idx); in omap2_cm_write_mod_reg()
62 s16 idx) in omap2_cm_rmw_mod_reg_bits() argument
66 v = omap2_cm_read_mod_reg(module, idx); in omap2_cm_rmw_mod_reg_bits()
69 omap2_cm_write_mod_reg(v, module, idx); in omap2_cm_rmw_mod_reg_bits()
75 static inline u32 omap2_cm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask) in omap2_cm_read_mod_bits_shift() argument
79 v = omap2_cm_read_mod_reg(domain, idx); in omap2_cm_read_mod_bits_shift()
86 static inline u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) in omap2_cm_set_mod_reg_bits() argument
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/arch/sh/kernel/cpu/sh4a/
Dubc.c15 #define UBC_CBR(idx) (0xff200000 + (0x20 * idx)) argument
16 #define UBC_CRR(idx) (0xff200004 + (0x20 * idx)) argument
17 #define UBC_CAR(idx) (0xff200008 + (0x20 * idx)) argument
18 #define UBC_CAMR(idx) (0xff20000c + (0x20 * idx)) argument
32 static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_enable() argument
34 __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx)); in sh4a_ubc_enable()
35 __raw_writel(info->address, UBC_CAR(idx)); in sh4a_ubc_enable()
38 static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_disable() argument
40 __raw_writel(0, UBC_CBR(idx)); in sh4a_ubc_disable()
41 __raw_writel(0, UBC_CAR(idx)); in sh4a_ubc_disable()
Dclock-sh7770.c30 int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f); in module_clk_recalc() local
31 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
40 int idx = (__raw_readl(FRQCR) & 0x000f); in bus_clk_recalc() local
41 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
50 int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f); in cpu_clk_recalc() local
51 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
65 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
67 if (idx < ARRAY_SIZE(sh7770_clk_ops)) in arch_init_clk_ops()
68 *ops = sh7770_clk_ops[idx]; in arch_init_clk_ops()
Dclock-sh7780.c33 int idx = (__raw_readl(FRQCR) & 0x0003); in module_clk_recalc() local
34 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
43 int idx = ((__raw_readl(FRQCR) >> 16) & 0x0007); in bus_clk_recalc() local
44 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
53 int idx = ((__raw_readl(FRQCR) >> 24) & 0x0001); in cpu_clk_recalc() local
54 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
68 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
70 if (idx < ARRAY_SIZE(sh7780_clk_ops)) in arch_init_clk_ops()
71 *ops = sh7780_clk_ops[idx]; in arch_init_clk_ops()
76 int idx = ((__raw_readl(FRQCR) >> 20) & 0x0007); in shyway_clk_recalc() local
[all …]
/arch/microblaze/mm/
Dhighmem.c39 int idx, type; in kmap_atomic_high_prot() local
42 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_high_prot()
43 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_high_prot()
45 BUG_ON(!pte_none(*(kmap_pte-idx))); in kmap_atomic_high_prot()
47 set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); in kmap_atomic_high_prot()
58 unsigned int idx; in kunmap_atomic_high() local
65 idx = type + KM_TYPE_NR * smp_processor_id(); in kunmap_atomic_high()
67 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in kunmap_atomic_high()
73 pte_clear(&init_mm, vaddr, kmap_pte-idx); in kunmap_atomic_high()
/arch/powerpc/mm/
Dhighmem.c30 int idx, type; in kmap_atomic_high_prot() local
33 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_high_prot()
34 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_high_prot()
35 WARN_ON(IS_ENABLED(CONFIG_DEBUG_HIGHMEM) && !pte_none(*(kmap_pte - idx))); in kmap_atomic_high_prot()
36 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1); in kmap_atomic_high_prot()
52 unsigned int idx; in kunmap_atomic_high() local
54 idx = type + KM_TYPE_NR * smp_processor_id(); in kunmap_atomic_high()
55 WARN_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in kunmap_atomic_high()
61 pte_clear(&init_mm, vaddr, kmap_pte-idx); in kunmap_atomic_high()
/arch/sh/kernel/cpu/sh4/
Dclock-sh4.c37 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local
38 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
47 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007; in bus_clk_recalc() local
48 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
57 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007; in cpu_clk_recalc() local
58 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
72 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
74 if (idx < ARRAY_SIZE(sh4_clk_ops)) in arch_init_clk_ops()
75 *ops = sh4_clk_ops[idx]; in arch_init_clk_ops()
/arch/mips/include/asm/
Dmsa.h19 extern void read_msa_wr_b(unsigned idx, union fpureg *to);
20 extern void read_msa_wr_h(unsigned idx, union fpureg *to);
21 extern void read_msa_wr_w(unsigned idx, union fpureg *to);
22 extern void read_msa_wr_d(unsigned idx, union fpureg *to);
33 static inline void read_msa_wr(unsigned idx, union fpureg *to, in read_msa_wr() argument
38 read_msa_wr_b(idx, to); in read_msa_wr()
42 read_msa_wr_h(idx, to); in read_msa_wr()
46 read_msa_wr_w(idx, to); in read_msa_wr()
50 read_msa_wr_d(idx, to); in read_msa_wr()
58 extern void write_msa_wr_b(unsigned idx, union fpureg *from);
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/arch/sparc/mm/
Dhighmem.c47 long idx, type; in kmap_atomic_high_prot() local
50 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_high_prot()
51 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_high_prot()
61 BUG_ON(!pte_none(*(kmap_pte-idx))); in kmap_atomic_high_prot()
63 set_pte(kmap_pte-idx, mk_pte(page, prot)); in kmap_atomic_high_prot()
87 unsigned long idx; in kunmap_atomic_high() local
89 idx = type + KM_TYPE_NR * smp_processor_id(); in kunmap_atomic_high()
90 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN+idx)); in kunmap_atomic_high()
103 pte_clear(&init_mm, vaddr, kmap_pte-idx); in kunmap_atomic_high()
/arch/sh/kernel/cpu/sh2a/
Dclock-sh7201.c36 int idx = (__raw_readw(FREQCR) & 0x0007); in module_clk_recalc() local
37 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
46 int idx = (__raw_readw(FREQCR) & 0x0007); in bus_clk_recalc() local
47 return clk->parent->rate / pfc_divisors[idx]; in bus_clk_recalc()
56 int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007); in cpu_clk_recalc() local
57 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
71 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
80 if (idx < ARRAY_SIZE(sh7201_clk_ops)) in arch_init_clk_ops()
81 *ops = sh7201_clk_ops[idx]; in arch_init_clk_ops()
/arch/arm64/kernel/
Dperf_regs.c12 u64 perf_reg_value(struct pt_regs *regs, int idx) in perf_reg_value() argument
14 if (WARN_ON_ONCE((u32)idx >= PERF_REG_ARM64_MAX)) in perf_reg_value()
40 if ((u32)idx == PERF_REG_ARM64_SP) in perf_reg_value()
42 if ((u32)idx == PERF_REG_ARM64_LR) in perf_reg_value()
44 if (idx == 15) in perf_reg_value()
48 if ((u32)idx == PERF_REG_ARM64_SP) in perf_reg_value()
51 if ((u32)idx == PERF_REG_ARM64_PC) in perf_reg_value()
54 return regs->regs[idx]; in perf_reg_value()
/arch/nds32/kernel/
Dperf_event_cpu.c84 int idx = config >> 8; in nds32_pmu_map_raw_event() local
86 switch (idx) { in nds32_pmu_map_raw_event()
158 static inline int nds32_pfm_counter_has_overflowed(u32 pfm, int idx) in nds32_pfm_counter_has_overflowed() argument
162 switch (idx) { in nds32_pfm_counter_has_overflowed()
232 int idx; in nds32_pmu_handle_irq() local
250 for (idx = 0; idx < cpu_pmu->num_events; ++idx) { in nds32_pmu_handle_irq()
251 struct perf_event *event = cpuc->events[idx]; in nds32_pmu_handle_irq()
262 if (!nds32_pfm_counter_has_overflowed(pfm, idx)) in nds32_pmu_handle_irq()
287 static inline int nds32_pfm_counter_valid(struct nds32_pmu *cpu_pmu, int idx) in nds32_pfm_counter_valid() argument
289 return ((idx >= 0) && (idx < cpu_pmu->num_events)); in nds32_pfm_counter_valid()
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