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Searched refs:loads (Results 1 – 19 of 19) sorted by relevance

/arch/powerpc/perf/
Dpower10-pmu.c115 GENERIC_EVENT_ATTR(mem-loads, MEM_LOADS);
119 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);
123 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);
126 CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3);
128 CACHE_EVENT_ATTR(branch-loads, PM_BR_CMPL);
Dpower9-pmu.c162 GENERIC_EVENT_ATTR(mem-loads, MEM_LOADS);
166 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);
170 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);
173 CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3);
176 CACHE_EVENT_ATTR(branch-loads, PM_BR_CMPL);
Dpower8-pmu.c134 CACHE_EVENT_ATTR(L1-dcache-loads, PM_LD_REF_L1);
139 CACHE_EVENT_ATTR(L1-icache-loads, PM_INST_FROM_L1);
143 CACHE_EVENT_ATTR(LLC-loads, PM_DATA_FROM_L3);
149 CACHE_EVENT_ATTR(branch-loads, PM_BRU_FIN);
/arch/alpha/lib/
Dev6-copy_user.S64 EXI( ldbu $1,0($17) ) # .. .. .. L : Keep loads separate from stores
116 EXI ( ldbu $2,0($17) ) # .. .. .. L : No loads in the same quad
203 EXI ( ldbu $2,0($17) ) # .. .. .. L : No loads in the same quad
/arch/mips/include/asm/
Dmips-r2-to-r6-emul.h22 u64 loads; member
Dfpu_emulator.h26 unsigned long loads; member
/arch/mips/kernel/
Dmips-r2-to-r6-emul.c1274 MIPS_R2_STATS(loads); in mipsr2_decoder()
1348 MIPS_R2_STATS(loads); in mipsr2_decoder()
1608 MIPS_R2_STATS(loads); in mipsr2_decoder()
1727 MIPS_R2_STATS(loads); in mipsr2_decoder()
2267 (unsigned long)__this_cpu_read(mipsr2emustats.loads), in mipsr2_emul_show()
2268 (unsigned long)__this_cpu_read(mipsr2bdemustats.loads)); in mipsr2_emul_show()
2324 __this_cpu_write((mipsr2emustats).loads, 0); in mipsr2_clear_show()
2325 __this_cpu_write((mipsr2bdemustats).loads, 0); in mipsr2_clear_show()
/arch/powerpc/lib/
Dmemcpy_64.S115 ld r9,0(r4) # 3+2n loads, 2+2n stores
127 0: ld r0,0(r4) # 4+2n loads, 3+2n stores
/arch/mips/math-emu/
Dme-debugfs.c55 __this_cpu_write((fpuemustats).loads, 0); in fpuemustats_clear_show()
211 FPU_STAT_CREATE(loads); in debugfs_fpuemu()
Dcp1emu.c1052 MIPS_FPU_EMU_INC_STATS(loads); in cop1Emulate()
1087 MIPS_FPU_EMU_INC_STATS(loads); in cop1Emulate()
1483 MIPS_FPU_EMU_INC_STATS(loads); in fpux_emu()
1592 MIPS_FPU_EMU_INC_STATS(loads); in fpux_emu()
/arch/arm/crypto/
Daes-ce-core.S310 vld1.8 {q0}, [r1] @ overlapping loads
348 vld1.8 {q0}, [r1] @ overlapping loads
/arch/m68k/fpsp040/
Dx_operr.S222 | Store_max loads the max pos or negative for the size, sets
/arch/arm/boot/dts/
Dmeson8.dtsi179 * code which is responsible for system suspend. It loads a
/arch/x86/events/intel/
Dcore.c279 EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3");
280 EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3");
4634 EVENT_ATTR_STR(mem-loads, mem_ld_hsw, "event=0xcd,umask=0x1,ldlat=3");
/arch/sh/
DKconfig744 first part of the romImage which in turn loads the rest the kernel
/arch/arm64/
DKconfig458 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
465 instructions to Write-Back memory are mixed with Device loads.
467 The workaround is to promote device loads to use Load-Acquire
/arch/arm/mm/
DKconfig938 not perform speculative loads into the D-cache. For such
/arch/x86/
DKconfig2169 If bootloader loads the kernel at a non-aligned address and
2173 If bootloader loads the kernel at a non-aligned address and
/arch/arm/
DKconfig1084 and Device/Strongly-Ordered loads and stores might cause deadlock