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/arch/mips/include/asm/
Dswitch_to.h32 extern asmlinkage struct task_struct *resume(struct task_struct *prev,
52 #define __mips_mt_fpaff_switch_to(prev) \ argument
54 struct thread_info *__prev_ti = task_thread_info(prev); \
58 (!(KSTK_STATUS(prev) & ST0_CU1))) { \
60 prev->cpus_mask = prev->thread.user_cpus_allowed; \
66 #define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0) argument
109 #define switch_to(prev, next, last) \ argument
111 __mips_mt_fpaff_switch_to(prev); \
112 lose_fpu_inatomic(1, prev); \
116 __save_dsp(prev); \
[all …]
/arch/powerpc/include/asm/
Dcmpxchg.h19 unsigned int prev, prev_mask, tmp, bitoff, off; \
33 : "=&r" (prev), "=&r" (tmp), "+m" (*(u32*)p) \
37 return prev >> bitoff; \
44 unsigned int prev, prev_mask, tmp, bitoff, off; \
66 : "=&r" (prev), "=&r" (tmp), "+m" (*(u32*)p) \
70 return prev >> bitoff; \
88 unsigned long prev; in __xchg_u32_local() local
94 : "=&r" (prev), "+m" (*(volatile unsigned int *)p) in __xchg_u32_local()
98 return prev; in __xchg_u32_local()
104 unsigned long prev; in __xchg_u32_relaxed() local
[all …]
/arch/ia64/include/asm/
Dswitch_to.h37 #define __switch_to(prev,next,last) do { \ argument
38 if (IA64_HAS_EXTRA_STATE(prev)) \
39 ia64_save_extra(prev); \
53 # define switch_to(prev,next,last) do { \ argument
54 if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) { \
55 ia64_psr(task_pt_regs(prev))->mfh = 0; \
56 (prev)->thread.flags |= IA64_THREAD_FPH_VALID; \
57 __ia64_save_fpu((prev)->thread.fph); \
59 __switch_to(prev, next, last); \
68 # define switch_to(prev,next,last) __switch_to(prev, next, last) argument
/arch/alpha/include/asm/
Dxchg.h131 unsigned long prev, tmp, cmp, addr64; in ____cmpxchg() local
148 : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64) in ____cmpxchg()
151 return prev; in ____cmpxchg()
157 unsigned long prev, tmp, cmp, addr64; in ____cmpxchg() local
174 : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64) in ____cmpxchg()
177 return prev; in ____cmpxchg()
183 unsigned long prev, cmp; in ____cmpxchg() local
196 : "=&r"(prev), "=&r"(cmp), "=m"(*m) in ____cmpxchg()
199 return prev; in ____cmpxchg()
205 unsigned long prev, cmp; in ____cmpxchg() local
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/arch/s390/include/asm/
Dswitch_to.h33 #define switch_to(prev, next, last) do { \ argument
39 save_access_regs(&prev->thread.acrs[0]); \
40 save_ri_cb(prev->thread.ri_cb); \
41 save_gs_cb(prev->thread.gs_cb); \
44 restore_ri_cb(next->thread.ri_cb, prev->thread.ri_cb); \
46 prev = __switch_to(prev, next); \
/arch/parisc/lib/
Dbitops.c62 u64 prev; in __cmpxchg_u64() local
65 if ((prev = *ptr) == old) in __cmpxchg_u64()
68 return prev; in __cmpxchg_u64()
74 unsigned int prev; in __cmpxchg_u32() local
77 if ((prev = *ptr) == old) in __cmpxchg_u32()
80 return (unsigned long)prev; in __cmpxchg_u32()
86 u8 prev; in __cmpxchg_u8() local
89 if ((prev = *ptr) == old) in __cmpxchg_u8()
92 return prev; in __cmpxchg_u8()
/arch/csky/include/asm/
Dswitch_to.h10 static inline void __switch_to_fpu(struct task_struct *prev, in __switch_to_fpu() argument
13 save_to_user_fp(&prev->thread.user_fp); in __switch_to_fpu()
17 static inline void __switch_to_fpu(struct task_struct *prev, in __switch_to_fpu() argument
28 #define switch_to(prev, next, last) \ argument
30 struct task_struct *__prev = (prev); \
33 ((last) = __switch_to((prev), (next))); \
Dmmu_context.h27 #define activate_mm(prev,next) switch_mm(prev, next, current) argument
36 switch_mm(struct mm_struct *prev, struct mm_struct *next, in switch_mm() argument
41 if (prev != next) in switch_mm()
/arch/x86/include/asm/
Dcmpxchg_32.h28 u64 prev = *ptr; in set_64bit() local
33 : "=m" (*ptr), "+A" (prev) in set_64bit()
49 u64 prev; in __cmpxchg64() local
51 : "=A" (prev), in __cmpxchg64()
57 return prev; in __cmpxchg64()
62 u64 prev; in __cmpxchg64_local() local
64 : "=A" (prev), in __cmpxchg64_local()
70 return prev; in __cmpxchg64_local()
Dmmu_context.h19 static inline void paravirt_activate_mm(struct mm_struct *prev, in paravirt_activate_mm() argument
82 extern void switch_ldt(struct mm_struct *prev, struct mm_struct *next);
88 static inline void switch_ldt(struct mm_struct *prev, struct mm_struct *next) in switch_ldt() argument
124 extern void switch_mm(struct mm_struct *prev, struct mm_struct *next,
127 extern void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
131 #define activate_mm(prev, next) \ argument
133 paravirt_activate_mm((prev), (next)); \
134 switch_mm((prev), (next), NULL); \
/arch/parisc/include/asm/
Dmmu_context.h52 static inline void switch_mm_irqs_off(struct mm_struct *prev, in switch_mm_irqs_off() argument
55 if (prev != next) { in switch_mm_irqs_off()
67 static inline void switch_mm(struct mm_struct *prev, in switch_mm() argument
72 if (prev == next) in switch_mm()
76 switch_mm_irqs_off(prev, next, tsk); in switch_mm()
83 static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) in activate_mm() argument
98 switch_mm(prev,next,current); in activate_mm()
/arch/arc/include/asm/
Dcmpxchg.h19 unsigned long prev; in __cmpxchg() local
33 : "=&r"(prev) /* Early clobber, to prevent reg reuse */ in __cmpxchg()
41 return prev; in __cmpxchg()
50 int prev; in __cmpxchg() local
57 prev = *p; in __cmpxchg()
58 if (prev == expected) in __cmpxchg()
61 return prev; in __cmpxchg()
Dswitch_to.h17 #define switch_to(prev, next, last) \ argument
19 dsp_save_restore(prev, next); \
20 fpu_save_restore(prev, next); \
21 last = __switch_to(prev, next);\
/arch/sh/include/asm/
Dswitch_to_32.h64 struct task_struct *__switch_to(struct task_struct *prev,
70 #define switch_to(prev, next, last) \ argument
80 if (is_dsp_enabled(prev)) \
81 __save_dsp(prev); \
85 __ts1 = (u32 *)&prev->thread.sp; \
86 __ts2 = (u32 *)&prev->thread.pc; \
87 __ts4 = (u32 *)prev; \
Dfutex-irq.h11 u32 prev = 0; in atomic_futex_op_cmpxchg_inatomic() local
15 ret = get_user(prev, uaddr); in atomic_futex_op_cmpxchg_inatomic()
16 if (!ret && oldval == prev) in atomic_futex_op_cmpxchg_inatomic()
21 *uval = prev; in atomic_futex_op_cmpxchg_inatomic()
/arch/powerpc/platforms/cell/spufs/
Dswitch.c1777 static int quiece_spu(struct spu_state *prev, struct spu *spu) in quiece_spu() argument
1789 if (check_spu_isolate(prev, spu)) { /* Step 2. */ in quiece_spu()
1792 disable_interrupts(prev, spu); /* Step 3. */ in quiece_spu()
1793 set_watchdog_timer(prev, spu); /* Step 4. */ in quiece_spu()
1794 inhibit_user_access(prev, spu); /* Step 5. */ in quiece_spu()
1795 if (check_spu_isolate(prev, spu)) { /* Step 6. */ in quiece_spu()
1798 set_switch_pending(prev, spu); /* Step 7. */ in quiece_spu()
1799 save_mfc_cntl(prev, spu); /* Step 8. */ in quiece_spu()
1800 save_spu_runcntl(prev, spu); /* Step 9. */ in quiece_spu()
1801 save_mfc_sr1(prev, spu); /* Step 10. */ in quiece_spu()
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/arch/hexagon/include/asm/
Dmmu_context.h55 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, in switch_mm() argument
64 if (next->context.generation < prev->context.generation) { in switch_mm()
68 next->context.generation = prev->context.generation; in switch_mm()
77 static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) in activate_mm() argument
82 switch_mm(prev, next, current_thread_info()->task); in activate_mm()
/arch/c6x/include/asm/
Dswitch_to.h17 asmlinkage void *__switch_to(struct thread_struct *prev,
21 #define switch_to(prev, next, last) \ argument
24 (last) = __switch_to(&(prev)->thread, \
25 &(next)->thread, (prev)); \
/arch/x86/kernel/cpu/
Drdrand.c33 unsigned long tmp, prev; in x86_init_rdrand() local
51 prev = tmp; in x86_init_rdrand()
54 if (prev != tmp) in x86_init_rdrand()
57 prev = tmp; in x86_init_rdrand()
/arch/riscv/include/asm/
Dswitch_to.h47 static inline void __switch_to_aux(struct task_struct *prev, in __switch_to_aux() argument
52 regs = task_pt_regs(prev); in __switch_to_aux()
54 fstate_save(prev, regs); in __switch_to_aux()
69 #define switch_to(prev, next, last) \ argument
71 struct task_struct *__prev = (prev); \
/arch/powerpc/perf/
D8xx-pmu.c122 s64 prev, val = 0, delta = 0; in mpc8xx_pmu_read() local
128 prev = local64_read(&event->hw.prev_count); in mpc8xx_pmu_read()
132 delta = 16 * (val - prev); in mpc8xx_pmu_read()
136 delta = prev - val; in mpc8xx_pmu_read()
142 delta = (s64)((s32)val - (s32)prev); in mpc8xx_pmu_read()
146 delta = (s64)((s32)val - (s32)prev); in mpc8xx_pmu_read()
149 } while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev); in mpc8xx_pmu_read()
/arch/h8300/include/asm/
Dswitch_to.h35 #define switch_to(prev, next, last) \ argument
45 : "r" (&(prev->thread)), \
47 "g" (prev) \
/arch/microblaze/include/asm/
Dswitch_to.h12 extern struct task_struct *_switch_to(struct thread_info *prev,
15 #define switch_to(prev, next, last) \ argument
17 (last) = _switch_to(task_thread_info(prev), \
/arch/sparc/lib/
Datomic32.c165 u32 prev; in __cmpxchg_u32() local
168 if ((prev = *ptr) == old) in __cmpxchg_u32()
172 return (unsigned long)prev; in __cmpxchg_u32()
179 u64 prev; in __cmpxchg_u64() local
182 if ((prev = *ptr) == old) in __cmpxchg_u64()
186 return prev; in __cmpxchg_u64()
193 u32 prev; in __xchg_u32() local
196 prev = *ptr; in __xchg_u32()
200 return (unsigned long)prev; in __xchg_u32()
/arch/riscv/kernel/
Dcacheinfo.c120 struct device_node *prev = NULL; in init_cache_level() local
132 prev = np; in init_cache_level()
134 of_node_put(prev); in init_cache_level()
135 prev = np; in init_cache_level()
163 struct device_node *prev = NULL; in populate_cache_leaves() local
170 prev = np; in populate_cache_leaves()
172 of_node_put(prev); in populate_cache_leaves()
173 prev = np; in populate_cache_leaves()

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