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Searched refs:psr (Results 1 – 25 of 65) sorted by relevance

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/arch/sparc/include/asm/
Dhead_32.h13 rd %psr, %l0; b label; rd %wim, %l3; nop;
16 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
17 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
21 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
38 rd %psr, %l0;
42 rd %psr,%l0; \
50 rd %psr,%l0; \
59 b getcc_trap_handler; rd %psr, %l0; nop; nop;
63 b setcc_trap_handler; rd %psr, %l0; nop; nop;
67 rd %psr, %i0; jmp %l2; rett %l2 + 4; nop;
[all …]
Dpsr.h21 unsigned int psr; in get_psr() local
27 : "=r" (psr) in get_psr()
31 return psr; in get_psr()
Dsyscall.h43 return (regs->psr & PSR_C) ? true : false; in syscall_has_error()
47 regs->psr |= PSR_C; in syscall_set_error()
51 regs->psr &= ~PSR_C; in syscall_clear_error()
Dptrace.h124 return (regs->psr & PSR_SYSCALL); in pt_regs_is_syscall()
129 return (regs->psr &= ~PSR_SYSCALL); in pt_regs_clear_syscall()
143 #define user_mode(regs) (!((regs)->psr & PSR_PS))
Dswitch_to_32.h24 (prv)->thread.kregs->psr &= ~PSR_EF; \
34 (nxt)->thread.kregs->psr&=~PSR_EF; \
/arch/sparc/kernel/
Dtraps_32.c89 make_task_dead((regs->psr & PSR_PS) ? SIGKILL : SIGSEGV); in die_if_kernel()
100 if(regs->psr & PSR_PS) in do_hw_interrupt()
108 unsigned long psr) in do_illegal_instruction() argument
110 if(psr & PSR_PS) in do_illegal_instruction()
121 unsigned long psr) in do_priv_instruction() argument
123 if(psr & PSR_PS) in do_priv_instruction()
131 unsigned long psr) in do_memaccess_unaligned() argument
133 if(regs->psr & PSR_PS) { in do_memaccess_unaligned()
157 unsigned long psr) in do_fpd_trap() argument
160 if(psr & PSR_PS) in do_fpd_trap()
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Dentry.S159 wr %l0, 0x0, %psr
181 wr %l4, 0x0, %psr
183 wr %l4, PSR_ET, %psr
200 wr %l0, PSR_ET, %psr
230 wr %g2, 0x0, %psr
232 wr %g2, PSR_ET, %psr
239 wr %g2, PSR_ET, %psr ! keep ET up
249 wr %g2, 0x0, %psr
251 wr %g2, PSR_ET, %psr
255 wr %l0, PSR_ET, %psr
[all …]
Dentry.h16 unsigned long npc, unsigned long psr);
19 unsigned long npc, unsigned long psr);
21 unsigned long npc, unsigned long psr);
23 unsigned long npc, unsigned long psr);
25 unsigned long npc, unsigned long psr);
27 unsigned long npc, unsigned long psr);
29 unsigned long npc, unsigned long psr);
31 unsigned long npc, unsigned long psr);
33 unsigned long npc, unsigned long psr);
35 unsigned long npc, unsigned long psr);
Dtrampoline_32.S47 wr %g1, 0x0, %psr ! traps off though
70 rd %psr, %g1
71 wr %g1, PSR_ET, %psr ! traps on
101 wr %g1, 0x0, %psr ! traps off though
131 rd %psr, %g1
132 wr %g1, PSR_ET, %psr ! traps on
160 wr %g1, 0x0, %psr ! traps off though
187 rd %psr, %g1
188 wr %g1, PSR_ET, %psr ! traps on
Dsignal_32.c107 up_psr = regs->psr; in do_sigreturn()
111 regs->psr = (up_psr & ~(PSR_ICC | PSR_EF)) in do_sigreturn()
112 | (regs->psr & (PSR_ICC | PSR_EF)); in do_sigreturn()
144 unsigned int psr, pc, npc, ufp; in do_rt_sigreturn() local
166 err |= __get_user(psr, &sf->regs.psr); in do_rt_sigreturn()
171 regs->psr = (regs->psr & ~PSR_ICC) | (psr & PSR_ICC); in do_rt_sigreturn()
326 unsigned int psr; in setup_rt_frame() local
347 psr = regs->psr; in setup_rt_frame()
349 psr |= PSR_EF; in setup_rt_frame()
350 err |= __put_user(psr, &sf->regs.psr); in setup_rt_frame()
[all …]
Dsignal32.c89 unsigned int psr, ufp; in do_sigreturn32() local
129 err |= __get_user(psr, &sf->info.si_regs.psr); in do_sigreturn32()
133 if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) { in do_sigreturn32()
148 regs->tstate |= psr_to_tstate_icc(psr); in do_sigreturn32()
178 unsigned int psr, pc, npc, ufp; in do_rt_sigreturn32() local
217 err |= __get_user(psr, &sf->regs.psr); in do_rt_sigreturn32()
221 if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) { in do_rt_sigreturn32()
236 regs->tstate |= psr_to_tstate_icc(psr); in do_rt_sigreturn32()
358 u32 psr; in setup_frame32() local
395 psr = tstate_to_psr(regs->tstate); in setup_frame32()
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Drtrap_32.S58 wr %t_psr, 0x0, %psr
88 wr %t_psr, 0x0, %psr
96 wr %t_psr, PSR_ET, %psr
154 wr %t_psr, 0x0, %psr
167 wr %t_psr, PSR_ET, %psr
210 wr %t_psr, 0x0, %psr
219 wr %t_psr, PSR_ET, %psr
Dptrace_32.c100 membuf_store(&to, regs->psr); in genregs32_get()
114 u32 psr; in genregs32_set() local
139 &psr, in genregs32_set()
143 regs->psr = (regs->psr & ~(PSR_ICC | PSR_SYSCALL)) | in genregs32_set()
144 (psr & (PSR_ICC | PSR_SYSCALL)); in genregs32_set()
253 membuf_store(&to, regs->psr); in getregs_get()
277 regs->psr = (regs->psr & ~(PSR_ICC | PSR_SYSCALL)) | in setregs_set()
Dsigutil_32.c23 regs->psr &= ~(PSR_EF); in save_fpu_state()
32 regs->psr &= ~(PSR_EF); in save_fpu_state()
58 regs->psr &= ~PSR_EF; in restore_fpu_state()
62 regs->psr &= ~PSR_EF; in restore_fpu_state()
Dwof.S122 wr %t_psr, 0x0, %psr ! restore condition codes in %psr
191 wr %t_psr, 0x0, %psr
207 rd %psr, %glob_tmp
253 wr %t_psr, PSR_ET, %psr
286 wr %t_psr, 0x0, %psr
364 rd %psr, %glob_tmp
Dprocess_32.c127 r->psr, r->pc, r->npc, r->y, print_tainted()); in show_regs()
314 unsigned long psr; local
321 psr = childregs->psr = get_psr();
322 ti->kpsr = psr | PSR_PIL;
323 ti->kwim = 1 << (((psr & PSR_CWP) + 1) % nwindows);
366 childregs->psr &= ~PSR_EF;
Dkgdb_32.c38 gdb_regs[GDB_PSR] = regs->psr; in pt_regs_to_gdb_regs()
93 if (regs->psr != gdb_regs[GDB_PSR]) { in gdb_regs_to_pt_regs()
94 unsigned long cwp = regs->psr & PSR_CWP; in gdb_regs_to_pt_regs()
96 regs->psr = (gdb_regs[GDB_PSR] & ~PSR_CWP) | cwp; in gdb_regs_to_pt_regs()
/arch/powerpc/platforms/powernv/
Dopal-psr.c30 int psr, ret, token; in psr_show() local
43 (u32 *)__pa(&psr)); in psr_show()
54 ret = sprintf(buf, "%u\n", be32_to_cpu(psr)); in psr_show()
60 ret = sprintf(buf, "%u\n", be32_to_cpu(psr)); in psr_show()
80 int psr, ret, token; in psr_store() local
82 ret = kstrtoint(buf, 0, &psr); in psr_store()
96 ret = opal_set_power_shift_ratio(psr_attr->handle, token, psr); in psr_store()
125 struct device_node *psr, *node; in opal_psr_init() local
128 psr = of_find_compatible_node(NULL, NULL, in opal_psr_init()
130 if (!psr) { in opal_psr_init()
[all …]
/arch/ia64/include/asm/native/
Dinst.h36 (pred) mov reg = psr
76 ssm psr.ic | PSR_DEFAULT_BITS \
82 ssm psr.ic \
87 rsm psr.ic
90 (pred) ssm psr.i
93 (pred) rsm psr.i
96 rsm psr.i | psr.ic
99 rsm psr.dt
102 rsm psr.be | psr.i
105 ssm psr.dt \
/arch/sparc/include/uapi/asm/
Dpsrcompat.h38 static inline unsigned long psr_to_tstate_icc(unsigned int psr) in psr_to_tstate_icc() argument
40 unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12; in psr_to_tstate_icc()
41 if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) in psr_to_tstate_icc()
42 tstate |= ((unsigned long)(psr & PSR_XCC)) << 20; in psr_to_tstate_icc()
/arch/ia64/include/asm/
Dmca_asm.h84 mov old_psr = psr; \
100 mov temp1 = psr; \
101 mov temp2 = psr; \
106 mov psr.l = temp2; \
164 mov temp2 = psr; \
170 mov psr.l = temp2; \
/arch/ia64/kernel/
Dpal.S72 mov loc3 = psr
80 rsm psr.i
84 1: mov psr.l = loc3
115 mov loc3 = psr
117 rsm psr.i
121 .ret0: mov psr.l = loc3
165 mov loc3 = psr // save psr
191 mov psr.l = loc3 // restore init PSR
220 mov loc3 = psr // save psr
250 mov psr.l = loc3 // restore init PSR
/arch/arm64/include/asm/
Dptrace.h149 static inline unsigned long compat_psr_to_pstate(const unsigned long psr) in compat_psr_to_pstate() argument
153 pstate = psr & ~COMPAT_PSR_DIT_BIT; in compat_psr_to_pstate()
155 if (psr & COMPAT_PSR_DIT_BIT) in compat_psr_to_pstate()
163 unsigned long psr; in pstate_to_compat_psr() local
165 psr = pstate & ~PSR_AA32_DIT_BIT; in pstate_to_compat_psr()
168 psr |= COMPAT_PSR_DIT_BIT; in pstate_to_compat_psr()
170 return psr; in pstate_to_compat_psr()
/arch/arm/kernel/
Dopcodes.c52 asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr) in arm_check_condition() argument
55 u32 psr_cond = psr >> 28; in arm_check_condition()
/arch/arm/mm/
Dabort-macro.S13 .macro do_thumb_abort, fsr, pc, psr, tmp
14 tst \psr, #PSR_T_BIT

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