Searched refs:rIP (Results 1 – 2 of 2) sorted by relevance
| /arch/powerpc/crypto/ |
| D | aes-spe-modes.S | 21 lwz reg,off(rIP); /* IV loading with offset */
23 stw reg,off(rIP); /* IV saving with offset */
38 lwbrx reg,0,rIP; /* load reversed */ \
39 addi rIP,rIP,4; /* and increment pointer */
41 stwbrx reg,0,rIP; /* load reversed */ \
42 addi rIP,rIP,4; /* and increment pointer */
44 subi rIP,rIP,16; /* must reset pointer */
467 subi rIP,rIP,CTR_DEC
471 lbzu rW4,1(rIP) /* bytewise xor for partial block */
476 subf rIP,rLN,rIP
[all …]
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| D | aes-spe-regs.h | 14 #define rIP r8 /* potiner to IV (CBC/CTR/XTS modes) */ macro
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