| /arch/x86/kernel/ |
| D | aperture_64.c | 130 static u32 __init find_cap(int bus, int slot, int func, int cap) in find_cap() argument
135 if (!(read_pci_config_16(bus, slot, func, PCI_STATUS) & in find_cap()
139 pos = read_pci_config_byte(bus, slot, func, PCI_CAPABILITY_LIST); in find_cap()
144 id = read_pci_config_byte(bus, slot, func, pos+PCI_CAP_LIST_ID); in find_cap()
149 pos = read_pci_config_byte(bus, slot, func, in find_cap()
156 static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order) in read_agp() argument
165 pr_info("pci 0000:%02x:%02x:%02x: AGP bridge\n", bus, slot, func); in read_agp()
166 apsizereg = read_pci_config_16(bus, slot, func, cap + 0x14); in read_agp()
169 bus, slot, func); in read_agp()
185 aper_low = read_pci_config(bus, slot, func, 0x10); in read_agp()
[all …]
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| D | early-quirks.c | 31 static void __init fix_hypertransport_config(int num, int slot, int func) in fix_hypertransport_config() argument
40 htcfg = read_pci_config(num, slot, func, 0x68); in fix_hypertransport_config()
50 write_pci_config(num, slot, func, 0x68, htcfg); in fix_hypertransport_config()
57 static void __init via_bugs(int num, int slot, int func) in via_bugs() argument
80 static void __init nvidia_bugs(int num, int slot, int func) in nvidia_bugs() argument
116 static u32 __init ati_ixp4x0_rev(int num, int slot, int func) in ati_ixp4x0_rev() argument
121 b = read_pci_config_byte(num, slot, func, 0xac); in ati_ixp4x0_rev()
123 write_pci_config_byte(num, slot, func, 0xac, b); in ati_ixp4x0_rev()
125 d = read_pci_config(num, slot, func, 0x70); in ati_ixp4x0_rev()
127 write_pci_config(num, slot, func, 0x70, d); in ati_ixp4x0_rev()
[all …]
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| /arch/x86/kvm/mmu/ |
| D | page_track.c | 21 void kvm_page_track_free_memslot(struct kvm_memory_slot *slot) in kvm_page_track_free_memslot() argument
26 kvfree(slot->arch.gfn_track[i]); in kvm_page_track_free_memslot()
27 slot->arch.gfn_track[i] = NULL; in kvm_page_track_free_memslot()
31 int kvm_page_track_create_memslot(struct kvm_memory_slot *slot, in kvm_page_track_create_memslot() argument
37 slot->arch.gfn_track[i] = in kvm_page_track_create_memslot()
38 __vcalloc(npages, sizeof(*slot->arch.gfn_track[i]), in kvm_page_track_create_memslot()
40 if (!slot->arch.gfn_track[i]) in kvm_page_track_create_memslot()
47 kvm_page_track_free_memslot(slot); in kvm_page_track_create_memslot()
59 static void update_gfn_track(struct kvm_memory_slot *slot, gfn_t gfn, in update_gfn_track() argument
64 index = gfn_to_index(gfn, slot->base_gfn, PG_LEVEL_4K); in update_gfn_track()
[all …]
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| /arch/sparc/include/asm/ |
| D | parport.h | 117 int slot, err; in ecpp_probe() local
130 for (slot = 0; slot < PARPORT_PC_MAX_PORTS; slot++) { in ecpp_probe()
131 if (!test_and_set_bit(slot, dma_slot_map)) in ecpp_probe()
135 if (slot >= PARPORT_PC_MAX_PORTS) in ecpp_probe()
138 spin_lock_init(&sparc_ebus_dmas[slot].info.lock); in ecpp_probe()
141 sparc_ebus_dmas[slot].info.regs = in ecpp_probe()
144 if (!sparc_ebus_dmas[slot].info.regs) in ecpp_probe()
147 sparc_ebus_dmas[slot].info.flags = 0; in ecpp_probe()
148 sparc_ebus_dmas[slot].info.callback = NULL; in ecpp_probe()
149 sparc_ebus_dmas[slot].info.client_cookie = NULL; in ecpp_probe()
[all …]
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| /arch/x86/pci/ |
| D | early.c | 11 u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) in read_pci_config() argument
14 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config()
19 u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset) in read_pci_config_byte() argument
22 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_byte()
27 u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset) in read_pci_config_16() argument
30 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_16()
35 void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, in write_pci_config() argument
38 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config()
42 void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) in write_pci_config_byte() argument
44 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config_byte()
[all …]
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| D | broadcom_bus.c | 18 static void __init cnb20le_res(u8 bus, u8 slot, u8 func) in cnb20le_res() argument
27 fbus = read_pci_config_byte(bus, slot, func, 0x44); in cnb20le_res()
28 lbus = read_pci_config_byte(bus, slot, func, 0x45); in cnb20le_res()
46 word1 = read_pci_config_16(bus, slot, func, 0xc0); in cnb20le_res()
47 word2 = read_pci_config_16(bus, slot, func, 0xc2); in cnb20le_res()
56 word1 = read_pci_config_16(bus, slot, func, 0xc4); in cnb20le_res()
57 word2 = read_pci_config_16(bus, slot, func, 0xc6); in cnb20le_res()
66 word1 = read_pci_config_16(bus, slot, func, 0xd0); in cnb20le_res()
67 word2 = read_pci_config_16(bus, slot, func, 0xd2); in cnb20le_res()
87 u8 bus = 0, slot = 0; in broadcom_postcore_init() local
[all …]
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| D | amd_bus.c | 24 u32 slot; member
64 unsigned slot; in early_root_info_init() local
91 slot = hb_probes[i].slot; in early_root_info_init()
92 id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID); in early_root_info_init()
117 reg = read_pci_config(bus, slot, 1, in early_root_info_init()
144 reg = read_pci_config(bus, slot, 0, AMD_NB_F0_NODE_ID); in early_root_info_init()
146 reg = read_pci_config(bus, slot, 0, AMD_NB_F0_UNIT_ID); in early_root_info_init()
153 reg = read_pci_config(bus, slot, 1, 0xc0 + (i << 3)); in early_root_info_init()
158 reg = read_pci_config(bus, slot, 1, 0xc4 + (i << 3)); in early_root_info_init()
219 reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3)); in early_root_info_init()
[all …]
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| /arch/ia64/kernel/ |
| D | kprobes.c | 85 static void __kprobes update_kprobe_inst_flag(uint template, uint slot, in update_kprobe_inst_flag() argument
92 p->ainsn.slot = slot; in update_kprobe_inst_flag()
105 if (bundle_encoding[template][slot] == B) { in update_kprobe_inst_flag()
121 } else if (bundle_encoding[template][slot] == X) { in update_kprobe_inst_flag()
138 static uint __kprobes is_cmp_ctype_unc_inst(uint template, uint slot, in is_cmp_ctype_unc_inst() argument
145 if (!((bundle_encoding[template][slot] == I) || in is_cmp_ctype_unc_inst()
146 (bundle_encoding[template][slot] == M))) in is_cmp_ctype_unc_inst()
174 static int __kprobes unsupported_inst(uint template, uint slot, in unsupported_inst() argument
182 if (is_cmp_ctype_unc_inst(template, slot, major_opcode, kprobe_inst)) { in unsupported_inst()
183 if (slot == 1 && qp) { in unsupported_inst()
[all …]
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| /arch/arm/mach-iop32x/ |
| D | iq80321.c | 68 iq80321_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in iq80321_pci_map_irq() argument
72 if ((slot == 2 || slot == 6) && pin == 1) { in iq80321_pci_map_irq()
75 } else if ((slot == 2 || slot == 6) && pin == 2) { in iq80321_pci_map_irq()
78 } else if ((slot == 2 || slot == 6) && pin == 3) { in iq80321_pci_map_irq()
81 } else if ((slot == 2 || slot == 6) && pin == 4) { in iq80321_pci_map_irq()
84 } else if (slot == 4 || slot == 8) { in iq80321_pci_map_irq()
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| D | iq31244.c | 100 ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in ep80219_pci_map_irq() argument
104 if (slot == 0) { in ep80219_pci_map_irq()
107 } else if (slot == 1) { in ep80219_pci_map_irq()
110 } else if (slot == 2) { in ep80219_pci_map_irq()
113 } else if (slot == 3) { in ep80219_pci_map_irq()
135 iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in iq31244_pci_map_irq() argument
139 if (slot == 0) { in iq31244_pci_map_irq()
142 } else if (slot == 1) { in iq31244_pci_map_irq()
145 } else if (slot == 2) { in iq31244_pci_map_irq()
148 } else if (slot == 3) { in iq31244_pci_map_irq()
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| /arch/sh/mm/ |
| D | ioremap_fixed.c | 54 int i, slot; in ioremap_fixed() local
63 slot = -1; in ioremap_fixed()
68 slot = i; in ioremap_fixed()
73 if (slot < 0) in ioremap_fixed()
86 idx0 = FIX_IOREMAP_BEGIN + slot; in ioremap_fixed()
105 int i, slot; in iounmap_fixed() local
107 slot = -1; in iounmap_fixed()
111 slot = i; in iounmap_fixed()
119 if (slot < 0) in iounmap_fixed()
124 idx = FIX_IOREMAP_BEGIN + slot + nrpages - 1; in iounmap_fixed()
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| /arch/mips/pci/ |
| D | fixup-rbtx4938.c | 16 int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in rbtx4938_pci_map_irq() argument
18 int irq = tx4938_pcic1_map_irq(dev, slot); in rbtx4938_pci_map_irq()
25 if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) { in rbtx4938_pci_map_irq()
28 irq = (irq + 0 + slot) % 4; in rbtx4938_pci_map_irq()
32 irq = (irq + 33 - slot) % 4; in rbtx4938_pci_map_irq()
34 irq = (irq + 3 + slot) % 4; in rbtx4938_pci_map_irq()
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| D | fixup-jmr3927.c | 34 int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in jmr3927_pci_map_irq() argument
40 if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) { in jmr3927_pci_map_irq()
45 } else if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) { in jmr3927_pci_map_irq()
53 irq = (irq + 33 - slot) % 4; in jmr3927_pci_map_irq()
55 irq = (irq + 3 + slot) % 4; in jmr3927_pci_map_irq()
76 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) in jmr3927_pci_map_irq()
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| D | fixup-rbtx4927.c | 39 int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in rbtx4927_pci_map_irq() argument
45 if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) { in rbtx4927_pci_map_irq()
48 irq = (irq + 0 + slot) % 4; in rbtx4927_pci_map_irq()
52 irq = (irq + 33 - slot) % 4; in rbtx4927_pci_map_irq()
54 irq = (irq + 3 + slot) % 4; in rbtx4927_pci_map_irq()
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| D | fixup-sni.c | 133 int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in pcibios_map_irq() argument
137 if (slot == 4) { in pcibios_map_irq()
145 slot = 5; in pcibios_map_irq()
147 return irq_tab_pcit_cplus[slot][pin]; in pcibios_map_irq()
149 return irq_tab_pcit[slot][pin]; in pcibios_map_irq()
153 return irq_tab_rm300d[slot][pin]; in pcibios_map_irq()
156 return irq_tab_rm200[slot][pin]; in pcibios_map_irq()
159 return irq_tab_rm300e[slot][pin]; in pcibios_map_irq()
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| /arch/arm/mach-omap2/ |
| D | board-n8x0.c | 182 static int n8x0_mmc_switch_slot(struct device *dev, int slot) in n8x0_mmc_switch_slot() argument
185 dev_dbg(dev, "Choose slot %d\n", slot + 1); in n8x0_mmc_switch_slot()
187 gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot); in n8x0_mmc_switch_slot()
191 static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot, in n8x0_mmc_set_power_menelaus() argument
197 dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1, in n8x0_mmc_set_power_menelaus()
200 if (slot == 0) { in n8x0_mmc_set_power_menelaus()
278 static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on, in n8x0_mmc_set_power() argument
281 if (board_is_n800() || slot == 0) in n8x0_mmc_set_power()
282 return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd); in n8x0_mmc_set_power()
289 static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode) in n8x0_mmc_set_bus_mode() argument
[all …]
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| /arch/x86/include/asm/ |
| D | pci-direct.h | 10 extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
11 extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset);
12 extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset);
13 extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val);
14 extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val);
15 extern void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val);
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| D | kvm_page_track.h | 45 void (*track_flush_slot)(struct kvm *kvm, struct kvm_memory_slot *slot,
52 void kvm_page_track_free_memslot(struct kvm_memory_slot *slot);
53 int kvm_page_track_create_memslot(struct kvm_memory_slot *slot,
57 struct kvm_memory_slot *slot, gfn_t gfn,
60 struct kvm_memory_slot *slot, gfn_t gfn,
73 void kvm_page_track_flush_slot(struct kvm *kvm, struct kvm_memory_slot *slot);
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| /arch/arm/mach-ixp4xx/ |
| D | gtwx5715-pci.c | 40 static int __init gtwx5715_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in gtwx5715_map_irq() argument
44 if ((slot == SLOT0_DEVID && pin == 1) || in gtwx5715_map_irq()
45 (slot == SLOT1_DEVID && pin == 2)) in gtwx5715_map_irq()
47 else if ((slot == SLOT0_DEVID && pin == 2) || in gtwx5715_map_irq()
48 (slot == SLOT1_DEVID && pin == 1)) in gtwx5715_map_irq()
52 __func__, slot, pin, rc); in gtwx5715_map_irq()
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| D | fsg-pci.c | 39 static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in fsg_map_irq() argument
48 slot -= 11; in fsg_map_irq()
50 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) in fsg_map_irq()
51 irq = pci_irq_table[slot - 1]; in fsg_map_irq()
53 __func__, slot, pin, irq); in fsg_map_irq()
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| /arch/powerpc/mm/book3s64/ |
| D | hash_native.c | 439 static long native_hpte_updatepp(unsigned long slot, unsigned long newpp, in native_hpte_updatepp() argument
443 struct hash_pte *hptep = htab_address + slot; in native_hpte_updatepp()
450 vpn, want_v & HPTE_V_AVPN, slot, newpp); in native_hpte_updatepp()
492 static long __native_hpte_find(unsigned long want_v, unsigned long slot) in __native_hpte_find() argument
500 hptep = htab_address + slot; in __native_hpte_find()
504 return slot; in __native_hpte_find()
505 ++slot; in __native_hpte_find()
516 long slot; in native_hpte_find() local
526 slot = __native_hpte_find(want_v, hpte_group); in native_hpte_find()
527 if (slot < 0) { in native_hpte_find()
[all …]
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| D | hash_hugepage.c | 30 unsigned long vpn, hash, shift, slot; in __hash_page_thp() local
109 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; in __hash_page_thp()
110 slot += hidx & _PTEIDX_GROUP_IX; in __hash_page_thp()
112 ret = mmu_hash_ops.hpte_updatepp(slot, rflags, vpn, in __hash_page_thp()
140 slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, 0, in __hash_page_thp()
145 if (unlikely(slot == -1)) { in __hash_page_thp()
147 slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, in __hash_page_thp()
151 if (slot == -1) { in __hash_page_thp()
164 if (unlikely(slot == -2)) { in __hash_page_thp()
175 mark_hpte_slot_valid(hpte_slot_array, index, slot); in __hash_page_thp()
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| D | hash_64k.c | 45 unsigned long vpn, hash, slot, gslot; in __hash_page_4K() local
160 slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, rflags, 0, in __hash_page_4K()
165 if (unlikely(slot == -1)) { in __hash_page_4K()
169 slot = mmu_hash_ops.hpte_insert(hpte_group, vpn, pa, in __hash_page_4K()
174 soft_invalid = hpte_soft_invalid(slot); in __hash_page_4K()
182 gslot = slot & _PTEIDX_GROUP_IX; in __hash_page_4K()
188 if (unlikely(slot == -1 || soft_invalid)) { in __hash_page_4K()
209 if (unlikely(slot == -2)) { in __hash_page_4K()
216 new_pte |= pte_set_hidx(ptep, rpte, subpg_index, slot, PTRS_PER_PTE); in __hash_page_4K()
231 unsigned long vpn, hash, slot; in __hash_page_64K() local
[all …]
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| /arch/alpha/kernel/ |
| D | sys_miata.c | 155 miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) in miata_map_irq() argument
185 if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) { in miata_map_irq()
204 int slot, pin = *pinp; in miata_swizzle() local
207 slot = PCI_SLOT(dev->devfn); in miata_swizzle()
212 slot = PCI_SLOT(dev->devfn) + 9; in miata_swizzle()
220 slot = PCI_SLOT(dev->devfn) + 9; in miata_swizzle()
228 slot = PCI_SLOT(dev->devfn); in miata_swizzle()
232 return slot; in miata_swizzle()
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| /arch/arm64/include/asm/ |
| D | vectors.h | 63 arm64_get_bp_hardening_vector(enum arm64_bp_harden_el1_vectors slot) in arm64_get_bp_hardening_vector() argument
66 return (char *)(TRAMP_VALIAS + SZ_2K * slot); in arm64_get_bp_hardening_vector()
68 WARN_ON_ONCE(slot == EL1_VECTOR_KPTI); in arm64_get_bp_hardening_vector()
70 return __bp_harden_el1_vectors + SZ_2K * slot; in arm64_get_bp_hardening_vector()
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