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Searched refs:t3 (Results 1 – 25 of 66) sorted by relevance

123

/arch/arm/crypto/
Dsha512-armv4.pl76 $t3="r12";
104 ldr $t3,[sp,#$Hoff+4] @ h.hi
119 adc $Thi,$Thi,$t3 @ T += h
120 ldr $t3,[sp,#$Goff+4] @ g.hi
124 eor $t1,$t1,$t3
132 eor $t1,$t1,$t3 @ Ch(e,f,g)
133 ldr $t3,[$Ktbl,#$hi] @ K[i].hi
141 adc $Thi,$Thi,$t3 @ T += K[i]
147 ldr $t3,[sp,#$Coff+0] @ c.lo
174 and $Alo,$Alo,$t3
[all …]
Dsha256-armv4.pl53 $T1="r3"; $t3="r3";
130 and $t3,$t3,$t2 @ (b^c)&=(a^b)
132 eor $t3,$t3,$b @ Maj(a,b,c)
134 @ add $h,$h,$t3 @ h+=Maj(a,b,c)
136 ($t2,$t3)=($t3,$t2);
239 eor $t3,$B,$C @ magic
249 ldreq $t3,[sp,#16*4] @ pull ctx
253 ldr $t0,[$t3,#0]
254 ldr $t1,[$t3,#4]
255 ldr $t2,[$t3,#8]
[all …]
Daes-neonbs-core.S169 y0, y1, y2, y3, t0, t1, t2, t3 argument
172 mul_gf4 \x0, \x1, \y0, \y1, \t2, \t3
175 mul_gf4_n_gf4 \t0, \t1, \y0, \y1, \t3, \x2, \x3, \y2, \y3, \t2
182 mul_gf4_n_gf4 \t0, \t1, \y0, \y1, \t3, \x6, \x7, \y2, \y3, \t2
185 mul_gf4 \x4, \x5, \y0, \y1, \t2, \t3
193 t0, t1, t2, t3, s0, s1, s2, s3
194 veor \t3, \x4, \x6
199 veor \s3, \t3, \t0
201 vand \s2, \t3, \s0
202 vorr \t3, \t3, \s0
[all …]
/arch/alpha/lib/
Dev67-strrchr.S42 sll t5, 8, t3 # U : 00000000ch000000
46 or t5, t3, t3 # E : 00000000chch0000
51 or t2, t3, t2 # E : 0000chchchch0000
60 cmpbge zero, t2, t3 # E : bits set iff byte == c
62 andnot t3, t4, t3 # E : clear garbage from char test
68 cmovne t3, v0, t6 # E : save previous comparisons match
72 cmovne t3, t3, t8 # E : Latency=2, extra map slot
78 cmpbge zero, t2, t3 # E : bits set iff byte == c
89 and t3, t4, t3 # E : mask out char matches after null
90 cmovne t3, t3, t8 # E : save it, if match found Latency=2, extra map slot
[all …]
Dstrrchr.S38 cmpbge zero, t2, t3 # e0 : bits set iff byte == c
40 andnot t3, t4, t3 # e0 : clear garbage from char test
46 cmovne t3, v0, t6 # .. e1 : save previous comparisons match
47 cmovne t3, t3, t8 # e0 :
51 cmpbge zero, t2, t3 # e0 : bits set iff byte == c
61 and t3, t4, t3 # e0 : mask out char matches after null
62 cmovne t3, t3, t8 # .. e1 : save it, if match found
63 cmovne t3, v0, t6 # e0 :
Dstrchr.S36 cmpbge zero, t1, t3 # e0 : bits set iff byte == c
37 or t2, t3, t0 # e1 : bits set iff char match or zero match
46 cmpbge zero, t1, t3 # .. e1 : bits set iff byte == c
47 or t2, t3, t0 # e0 :
53 and t0, t3, t1 # e0 : bit set iff byte was the char
57 and t0, 0xcc, t3 # .. e1 :
60 cmovne t3, 2, t3 # e0 :
62 addq t2, t3, t2 # e0 :
Dev67-strchr.S33 and a1, 0xff, t3 # E : 00000000000000ch
37 insbl t3, 6, a3 # U : 00ch000000000000
38 or t5, t3, a1 # E : 000000000000chch
55 cmpbge zero, t1, t3 # E : bits set iff byte == c
56 or t2, t3, t0 # E : bits set iff char match or zero match
74 cmpbge zero, t1, t3 # E : bits set iff byte == c
75 or t2, t3, t0 # E :
76 cttz t3, a2 # U0 : speculative (in case we get a match)
81 and t0, t3, t1 # E : bit set iff byte was the char
/arch/alpha/include/asm/
Dword-at-a-time.h42 unsigned long t1, t2, t3; in find_zero()
48 t3 = bits & 0xaa; in find_zero()
51 if (t3) t3 = 1; in find_zero()
52 return t1 + t2 + t3; in find_zero()
/arch/x86/crypto/
Dglue_helper-asm-avx2.S56 t1x, t2, t2x, t3, t3x, t4, t5) \ argument
66 vinserti128 $1, t2x, t3, t2; /* ab: le0 ; cd: le1 */ \
70 add2_le128(t2, t0, t4, t3, t5); /* ab: le2 ; cd: le3 */ \
72 add2_le128(t2, t0, t4, t3, t5); \
74 add2_le128(t2, t0, t4, t3, t5); \
76 add2_le128(t2, t0, t4, t3, t5); \
78 add2_le128(t2, t0, t4, t3, t5); \
80 add2_le128(t2, t0, t4, t3, t5); \
82 add2_le128(t2, t0, t4, t3, t5); \
119 tivx, t0, t0x, t1, t1x, t2, t2x, t3, \ argument
[all …]
Dcamellia-aesni-avx2-asm_64.S63 #define roundsm32(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ argument
73 vbroadcasti128 .Lpre_tf_hi_s4, t3; \
91 filter_8bit(x3, t2, t3, t7, t4); \
92 filter_8bit(x6, t2, t3, t7, t4); \
93 vextracti128 $1, x3, t3##_x; \
112 vaesenclast t4##_x, t3##_x, t3##_x; \
113 vinserti128 $1, t3##_x, x3, x3; \
117 vextracti128 $1, x1, t3##_x; \
128 vaesenclast t4##_x, t3##_x, t3##_x; \
129 vinserti128 $1, t3##_x, x1, x1; \
[all …]
Dcamellia-aesni-avx-asm_64.S51 #define roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \ argument
73 vmovdqa .Lpre_tf_hi_s4, t3; \
83 filter_8bit(x3, t2, t3, t7, t6); \
84 filter_8bit(x6, t2, t3, t7, t6); \
100 vmovdqa .Lpost_tf_hi_s3, t3; \
109 filter_8bit(x2, t2, t3, t7, t6); \
110 filter_8bit(x5, t2, t3, t7, t6); \
122 vpsrldq $3, t0, t3; \
127 vpshufb t6, t3, t3; \
159 vpxor t3, x4, x4; \
[all …]
/arch/mips/kernel/
Docteon_switch.S125 dmfc2 t3, 0x0082
132 sd t3, OCTEON_CP2_3DES_KEY+16(a0)
133 dmfc2 t3, 0x0103
140 sd t3, OCTEON_CP2_AES_IV+8(a0)
141 dmfc2 t3, 0x0107
148 sd t3, OCTEON_CP2_AES_KEY+24(a0)
161 dmfc2 t3, 0x0242
168 sd t3, OCTEON_CP2_HSH_DATW+16(a0)
169 dmfc2 t3, 0x0246
176 sd t3, OCTEON_CP2_HSH_DATW+48(a0)
[all …]
Dmcount.S88 sltu t3, t1, a0 /* t3 = (a0 > _etext) */
89 or t1, t2, t3
136 PTR_L t3, ftrace_graph_return
137 bne t1, t3, ftrace_graph_caller
140 PTR_L t3, ftrace_graph_entry
141 bne t1, t3, ftrace_graph_caller
/arch/mips/netlogic/common/
Dsmpboot.S110 li t3, CKSEG1ADDR(RESET_DATA_PHYS)
111 ADDIU t1, t3, BOOT_CPU_READY
113 li t3, 1
114 sw t3, 0(t1)
125 nor t3, t2, zero
133 and t2, t1, t3 /* mask out old thread mode */
Dreset.S104 li t3, 0x1000 /* loop count */
124 bne t3, t2, 11b
189 mul t3, t2, t1 /* t3 = node * 0x40000 */
196 add t2, t2, t3 /* t2 <- SYS offset for node */
270 li t3, CKSEG1ADDR(RESET_DATA_PHYS)
271 ADDIU t1, t3, BOOT_CPU_READY
/arch/arm64/crypto/
Dsha512-armv8.pl104 ($t0,$t1,$t2,$t3)=map("$reg_t$_",(16,17,19,28));
153 and $t3,$t3,$t2 // (b^c)&=(a^b)
155 eor $t3,$t3,$b // Maj(a,b,c)
157 add $h,$h,$t3 // h+=Maj(a,b,c)
158 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
177 and $t3,$t3,$t2 // (b^c)&=(a^b)
181 eor $t3,$t3,$b // Maj(a,b,c)
186 add $h,$h,$t3 // h+=Maj(a,b,c)
187 ldr $t3,[$Ktbl],#$SZ // *K++, $t2 in next round
192 ($t2,$t3)=($t3,$t2);
[all …]
Daes-neonbs-core.S114 y0, y1, y2, y3, t0, t1, t2, t3 argument
117 mul_gf4 \x0, \x1, \y0, \y1, \t2, \t3
120 mul_gf4_n_gf4 \t0, \t1, \y0, \y1, \t3, \x2, \x3, \y2, \y3, \t2
127 mul_gf4_n_gf4 \t0, \t1, \y0, \y1, \t3, \x6, \x7, \y2, \y3, \t2
130 mul_gf4 \x4, \x5, \y0, \y1, \t2, \t3
138 t0, t1, t2, t3, s0, s1, s2, s3
139 eor \t3, \x4, \x6
144 eor \s3, \t3, \t0
146 and \s2, \t3, \s0
147 orr \t3, \t3, \s0
[all …]
/arch/alpha/include/uapi/asm/
Dswab.h27 __u64 t0, t1, t2, t3; in __arch_swab32() local
34 t3 = t2 & 0x00FF00FF; /* t3 : 0000000000CC00AA */ in __arch_swab32()
35 t1 = t0 + t3; /* t1 : ssssssssDDCCBBAA */ in __arch_swab32()
/arch/mips/lib/
Dcsum_partial.S28 #undef t3
32 #define t3 $11 macro
182 CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4)
193 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
194 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
195 CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
196 CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4)
208 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
209 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
217 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
[all …]
/arch/mips/cavium-octeon/
Docteon-memcpy.S108 #undef t3
112 #define t3 $11 macro
188 EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
193 EXC( STORE t3, UNIT(3)(dst), s_exc_p13u)
197 EXC( LOAD t3, UNIT(7)(src), l_exc_copy)
202 EXC( STORE t3, UNIT(7)(dst), s_exc_p9u)
207 EXC( LOAD t3, UNIT(-5)(src), l_exc_copy_rewind16)
211 EXC( STORE t3, UNIT(-5)(dst), s_exc_p5u)
215 EXC( LOAD t3, UNIT(-1)(src), l_exc_copy_rewind16)
219 EXC( STORE t3, UNIT(-1)(dst), s_exc_p1u)
[all …]
/arch/mips/dec/
Dint-handler.S268 1: srlv t3,t1,t2
269 2: xor t1,t3
270 and t3,t0,t1
271 beqz t3,3f
273 move t0,t3
277 srlv t3,t1,t2
/arch/riscv/kernel/
Dmcount.S88 la t3, ftrace_graph_entry
89 ld t2, 0(t3)
93 la t3, ftrace_trace_function
94 ld t5, 0(t3)
/arch/x86/include/asm/
Dsyscall_wrapper.h63 #define SYSCALL_PT_ARG6(m, t1, t2, t3, t4, t5, t6) \ argument
64 SYSCALL_PT_ARG5(m, t1, t2, t3, t4, t5), m(t6, (regs->bp))
65 #define SYSCALL_PT_ARG5(m, t1, t2, t3, t4, t5) \ argument
66 SYSCALL_PT_ARG4(m, t1, t2, t3, t4), m(t5, (regs->di))
67 #define SYSCALL_PT_ARG4(m, t1, t2, t3, t4) \ argument
68 SYSCALL_PT_ARG3(m, t1, t2, t3), m(t4, (regs->si))
69 #define SYSCALL_PT_ARG3(m, t1, t2, t3) \ argument
70 SYSCALL_PT_ARG2(m, t1, t2), m(t3, (regs->dx))
/arch/s390/include/asm/
Dstacktrace.h138 #define CALL_LARGS_3(t1, a1, t2, a2, t3, a3) \ argument
140 long arg3 = (long)(t3)(a3)
141 #define CALL_LARGS_4(t1, a1, t2, a2, t3, a3, t4, a4) \ argument
142 CALL_LARGS_3(t1, a1, t2, a2, t3, a3); \
144 #define CALL_LARGS_5(t1, a1, t2, a2, t3, a3, t4, a4, t5, a5) \ argument
145 CALL_LARGS_4(t1, a1, t2, a2, t3, a3, t4, a4); \
/arch/mips/include/asm/
Dregdef.h33 #define t3 $11 macro
84 #define t3 $15 macro

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