/arch/arm/mach-dove/ |
D | common.c | 76 static struct clk *tclk; variable 92 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, dove_tclk); in dove_clk_init() 113 orion_clkdev_add(NULL, "orion_spi.0", tclk); in dove_clk_init() 114 orion_clkdev_add(NULL, "orion_spi.1", tclk); in dove_clk_init() 115 orion_clkdev_add(NULL, "orion_wdt", tclk); in dove_clk_init() 116 orion_clkdev_add(NULL, "mv64xxx_i2c.0", tclk); in dove_clk_init() 186 IRQ_DOVE_UART_0, tclk); in dove_uart0_init() 195 IRQ_DOVE_UART_1, tclk); in dove_uart1_init() 204 IRQ_DOVE_UART_2, tclk); in dove_uart2_init() 213 IRQ_DOVE_UART_3, tclk); in dove_uart3_init()
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/arch/arm/plat-orion/ |
D | time.c | 197 unsigned int irq, unsigned int tclk) in orion_time_init() argument 207 ticks_per_jiffy = (tclk + HZ/2) / HZ; in orion_time_init() 209 orion_delay_timer.freq = tclk; in orion_time_init() 215 sched_clock_register(orion_read_sched_clock, 32, tclk); in orion_time_init() 228 tclk, 300, 32, clocksource_mmio_readl_down); in orion_time_init() 237 clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe); in orion_time_init()
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D | common.c | 38 void __init orion_clkdev_init(struct clk *tclk) in orion_clkdev_init() argument 40 orion_clkdev_add(NULL, "orion_spi.0", tclk); in orion_clkdev_init() 41 orion_clkdev_add(NULL, "orion_spi.1", tclk); in orion_clkdev_init() 42 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); in orion_clkdev_init() 43 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); in orion_clkdev_init() 44 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); in orion_clkdev_init() 45 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); in orion_clkdev_init() 46 orion_clkdev_add(NULL, "orion_wdt", tclk); in orion_clkdev_init() 47 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); in orion_clkdev_init()
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/arch/arm/mach-mv78xx0/ |
D | common.c | 168 static struct clk *tclk; variable 172 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, get_tclk()); in clk_init() 174 orion_clkdev_init(tclk); in clk_init() 294 IRQ_MV78XX0_UART_0, tclk); in mv78xx0_uart0_init() 304 IRQ_MV78XX0_UART_1, tclk); in mv78xx0_uart1_init() 314 IRQ_MV78XX0_UART_2, tclk); in mv78xx0_uart2_init() 323 IRQ_MV78XX0_UART_3, tclk); in mv78xx0_uart3_init()
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/arch/arm/mach-orion5x/ |
D | common.c | 66 static struct clk *tclk; variable 70 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, orion5x_tclk); in clk_init() 72 orion_clkdev_init(tclk); in clk_init() 149 IRQ_ORION5X_UART0, tclk); in orion5x_uart0_init() 158 IRQ_ORION5X_UART1, tclk); in orion5x_uart1_init()
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/arch/arm/plat-orion/include/plat/ |
D | time.h | 17 unsigned int irq, unsigned int tclk);
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D | common.h | 106 void __init orion_clkdev_init(struct clk *tclk);
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/arch/mips/include/asm/octeon/ |
D | cvmx-uctlx-defs.h | 357 uint64_t tclk:1; member 365 uint64_t tclk:1;
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/arch/powerpc/boot/dts/fsl/ |
D | bsc9131rdb.dtsi | 87 fsl,tclk-period = <5>;
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D | bsc9132qds.dtsi | 94 fsl,tclk-period = <5>;
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D | p2020rdb.dts | 226 fsl,tclk-period = <5>;
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D | p1010rdb.dtsi | 193 fsl,tclk-period = <10>;
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D | p1022ds.dtsi | 222 fsl,tclk-period = <5>;
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D | p2020rdb-pc.dtsi | 218 fsl,tclk-period = <5>;
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D | p1021rdb-pc.dtsi | 231 fsl,tclk-period = <10>;
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D | p1020rdb-pd.dts | 232 fsl,tclk-period = <10>;
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D | p2020ds.dtsi | 186 fsl,tclk-period = <5>;
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D | p1025twr.dtsi | 145 fsl,tclk-period = <10>;
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D | mpc8572ds.dtsi | 196 fsl,tclk-period = <5>;
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/arch/arm/mach-omap1/ |
D | clock.c | 749 void propagate_rate(struct clk *tclk) in propagate_rate() argument 753 list_for_each_entry(clkp, &tclk->children, sibling) { in propagate_rate()
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/arch/arm/boot/dts/ |
D | am437x-cm-t43.dts | 121 AM4372_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.tclk */
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D | ls1021a.dtsi | 739 fsl,tclk-period = <5>;
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/arch/powerpc/boot/dts/ |
D | mpc8313erdb.dts | 180 fsl,tclk-period = <10>;
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