| /arch/x86/events/zhaoxin/ |
| D | core.c | 438 PMU_FORMAT_ATTR(umask, "config:8-15");
570 X86_CONFIG(.event = 0x01, .umask = 0x01, .inv = 0x01, .cmask = 0x01); in zhaoxin_pmu_init()
573 X86_CONFIG(.event = 0x0f, .umask = 0x04, .inv = 0, .cmask = 0); in zhaoxin_pmu_init()
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| /arch/ia64/kernel/ |
| D | ptrace.c | 253 unsigned long umask = 0, mask, m; in get_rnat() local
281 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask; in get_rnat()
282 urnat = (pt->ar_rnat & umask); in get_rnat()
283 mask &= ~umask; in get_rnat()
312 unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m; in put_rnat() local
355 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask; in put_rnat()
356 pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask); in put_rnat()
357 mask &= ~umask; in put_rnat()
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| /arch/x86/kernel/cpu/resctrl/ |
| D | pseudo_lock.c | 1070 .umask = 0x10); in measure_l2_residency()
1072 .umask = 0x2); in measure_l2_residency()
1109 .umask = 0x4f); in measure_l3_residency()
1111 .umask = 0x41); in measure_l3_residency()
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| /arch/x86/events/intel/ |
| D | p6.c | 185 PMU_FORMAT_ATTR(umask, "config:8-15" );
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| D | knc.c | 276 PMU_FORMAT_ATTR(umask, "config:8-15" );
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| D | core.c | 3464 u64 alt_config = X86_CONFIG(.event=0xc2, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_snb()
3488 u64 alt_config = X86_CONFIG(.event=0xc0, .umask=0x01, .inv=1, .cmask=16); in intel_pebs_aliases_precdist()
3942 X86_CONFIG(.event=0xc0, .umask=0x01)) { in bdw_limit_period()
3956 PMU_FORMAT_ATTR(umask, "config:8-15" );
5073 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
5076 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init()
5231 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
5234 X86_CONFIG(.event=0xb1, .umask=0x3f, .inv=1, .cmask=1); in intel_pmu_init()
5271 X86_CONFIG(.event=0x0e, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
5274 X86_CONFIG(.event=0xb1, .umask=0x01, .inv=1, .cmask=1); in intel_pmu_init()
[all …]
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| D | uncore_snb.c | 134 DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");
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| D | uncore_nhmex.c | 192 DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");
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| D | uncore_snbep.c | 454 DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");
455 DEFINE_UNCORE_FORMAT_ATTR(umask_ext, umask, "config:8-15,32-43,45-55");
456 DEFINE_UNCORE_FORMAT_ATTR(umask_ext2, umask, "config:8-15,32-57");
457 DEFINE_UNCORE_FORMAT_ATTR(umask_ext3, umask, "config:8-15,32-39");
458 DEFINE_UNCORE_FORMAT_ATTR(umask_ext4, umask, "config:8-15,32-55");
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| /arch/x86/events/amd/ |
| D | uncore.c | 291 DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");
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| D | core.c | 716 PMU_FORMAT_ATTR(umask, "config:8-15" );
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| /arch/sparc/kernel/ |
| D | etrap_32.S | 190 st %g2, [%curptr + TI_UWINMASK] ! store new umask
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| D | entry.S | 1234 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1250 andncc %o0, %o3, %o0 ! clean this bit in umask
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| /arch/mips/kernel/syscalls/ |
| D | syscall_n64.tbl | 103 93 n64 umask sys_umask
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| D | syscall_n32.tbl | 103 93 n32 umask sys_umask
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| D | syscall_o32.tbl | 72 60 o32 umask sys_umask
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| /arch/ia64/kernel/syscalls/ |
| D | syscall.tbl | 55 43 common umask sys_umask
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| /arch/x86/events/ |
| D | core.c | 1872 u64 umask = (config & ARCH_PERFMON_EVENTSEL_UMASK) >> 8; in x86_event_sysfs_show() local
1886 if (umask) in x86_event_sysfs_show()
1887 ret += sprintf(page + ret, ",umask=0x%02llx", umask); in x86_event_sysfs_show()
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| /arch/xtensa/kernel/syscalls/ |
| D | syscall.tbl | 69 58 common umask sys_umask
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| /arch/x86/entry/syscalls/ |
| D | syscall_64.tbl | 106 95 common umask sys_umask
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| /arch/parisc/kernel/syscalls/ |
| D | syscall.tbl | 73 60 common umask sys_umask
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| /arch/sh/kernel/syscalls/ |
| D | syscall.tbl | 70 60 common umask sys_umask
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| /arch/microblaze/kernel/syscalls/ |
| D | syscall.tbl | 70 60 common umask sys_umask
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| /arch/arm/tools/ |
| D | syscall.tbl | 74 60 common umask sys_umask
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| /arch/m68k/kernel/syscalls/ |
| D | syscall.tbl | 70 60 common umask sys_umask
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