| /arch/mips/include/asm/ |
| D | maar.h | 41 phys_addr_t upper, unsigned attrs) in write_maar_pair() argument
45 BUG_ON(((upper & 0xffff) != 0xffff) in write_maar_pair()
46 || ((upper & ~0xffffull) & ~(MIPS_MAAR_ADDR << 4))); in write_maar_pair()
57 write_c0_maar(((upper >> 4) & MIPS_MAAR_ADDR) | attrs); in write_maar_pair()
60 upper >>= MIPS_MAARX_ADDR_SHIFT; in write_maar_pair()
61 writex_c0_maar(((upper >> 4) & MIPS_MAARX_ADDR) | MIPS_MAARX_VH); in write_maar_pair()
101 phys_addr_t upper; member
122 write_maar_pair(i, cfg[i].lower, cfg[i].upper, cfg[i].attrs); in maar_config()
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| /arch/x86/include/asm/ |
| D | div64.h | 49 u32 upper; in div_u64_rem() local
51 upper = d.v32[1]; in div_u64_rem()
53 if (upper >= divisor) { in div_u64_rem()
54 d.v32[1] = upper / divisor; in div_u64_rem()
55 upper %= divisor; in div_u64_rem()
58 "rm" (divisor), "0" (d.v32[0]), "1" (upper)); in div_u64_rem()
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| /arch/x86/kernel/ |
| D | probe_roms.c | 201 unsigned long start, length, upper; in probe_roms() local
206 upper = adapter_rom_resources[0].start; in probe_roms()
207 for (start = video_rom_resource.start; start < upper; start += 2048) { in probe_roms()
229 if (start < upper) in probe_roms()
230 start = upper; in probe_roms()
234 upper = system_rom_resource.start; in probe_roms()
242 upper = extension_rom_resource.start; in probe_roms()
247 for (i = 0; i < ARRAY_SIZE(adapter_rom_resources) && start < upper; start += 2048) { in probe_roms()
259 if (!length || start + length > upper || !romchecksum(rom, length)) in probe_roms()
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| /arch/arm/kernel/ |
| D | module.c | 88 u32 upper, lower, sign, j1, j2; in apply_relocate() local
224 upper = __mem_to_opcode_thumb16(*(u16 *)loc); in apply_relocate()
240 sign = (upper >> 10) & 1; in apply_relocate()
245 ((upper & 0x03ff) << 12) | in apply_relocate()
274 upper = (u16)((upper & 0xf800) | (sign << 10) | in apply_relocate()
280 *(u16 *)loc = __opcode_to_mem_thumb16(upper); in apply_relocate()
286 upper = __mem_to_opcode_thumb16(*(u16 *)loc); in apply_relocate()
299 offset = ((upper & 0x000f) << 12) | in apply_relocate()
300 ((upper & 0x0400) << 1) | in apply_relocate()
308 upper = (u16)((upper & 0xfbf0) | in apply_relocate()
[all …]
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| D | module-plts.c | 127 u16 upper, lower; in is_zero_addend_relocation() local
131 upper = __mem_to_opcode_thumb16(((u16 *)tval)[0]); in is_zero_addend_relocation()
134 return (upper & 0x7ff) == 0x7ff && (lower & 0x2fff) == 0x2ffe; in is_zero_addend_relocation()
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| /arch/microblaze/kernel/ |
| D | ftrace.c | 174 unsigned int upper = (unsigned int)func; in ftrace_update_ftrace_func() local
179 upper = 0xb0000000 + (upper >> 16); /* imm func_upper */ in ftrace_update_ftrace_func()
183 __func__, (unsigned int)func, (unsigned int)ip, upper, lower); in ftrace_update_ftrace_func()
186 ret = ftrace_modify_code(ip, upper); in ftrace_update_ftrace_func()
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| /arch/x86/boot/ |
| D | string.c | 207 u32 upper; in __div_u64_rem() local
209 upper = d.v32[1]; in __div_u64_rem()
211 if (upper >= divisor) { in __div_u64_rem()
212 d.v32[1] = upper / divisor; in __div_u64_rem()
213 upper %= divisor; in __div_u64_rem()
216 "rm" (divisor), "0" (d.v32[0]), "1" (upper)); in __div_u64_rem()
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| /arch/powerpc/mm/ptdump/ |
| D | bats.c | 15 static void bat_show_603(struct seq_file *m, int idx, u32 lower, u32 upper, bool is_d) in bat_show_603() argument
17 u32 bepi = upper & 0xfffe0000; in bat_show_603()
18 u32 bl = (upper >> 2) & 0x7ff; in bat_show_603()
19 u32 k = upper & 3; in bat_show_603()
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| /arch/mips/mm/ |
| D | init.c | 288 cfg->upper = ALIGN_DOWN(PFN_PHYS(start_pfn + nr_pages), maar_align) - 1; in maar_res_walk()
318 phys_addr_t lower, upper, attr; in maar_init() local
359 upper = read_c0_maar(); in maar_init()
361 upper |= (phys_addr_t)readx_c0_maar() << MIPS_MAARX_ADDR_SHIFT; in maar_init()
371 attr = lower & upper; in maar_init()
373 upper = ((upper & MIPS_MAAR_ADDR) << 4) | 0xffff; in maar_init()
381 pr_cont("%pa-%pa", &lower, &upper); in maar_init()
391 recorded.cfgs[recorded.used].upper = upper; in maar_init()
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| /arch/m68k/fpsp040/ |
| D | binstr.S | 23 | to force the first byte formed to have a 0 in the upper 4 bits.
40 | upper word of d0. If it is the ls digit, write the word
51 | d2: upper 32-bits of fraction for mul by 8
53 | d4: upper 32-bits of fraction for mul by 2
106 addxl %d4,%d2 |add with extend upper 32 bits
109 swap %d6 |with d6 = 0; put 0 in upper word
117 aslw #4,%d7 |first digit in upper 4 bits d7b
131 lslw #4,%d7 |move it to upper 4 bits
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| D | x_store.S | 137 swap %d0 |d0 now in upper word
155 bfextu %d1{#1:#20},%d1 |get upper 20 bits of ms
160 lsll %d0,%d1 |put lower 11 bits in upper bits
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| D | sgetem.S | 112 bnes upper |then branch
124 upper: label
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| D | x_unfl.S | 146 | ;upper word for round
190 | information respectively on upper/lower register halves.
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| /arch/x86/crypto/ |
| D | crc32c-pcl-intel-asm_64.S | 251 # in upper 4 bits of len_dw
258 # less_than_8 expects length in upper 3 bits of len_dw
272 # upper lg(j) bits of len_dw
287 # upper 3 bits of len_dw
295 # upper 2 bits of len_dw
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| /arch/s390/tools/ |
| D | gen_opcode_table.c | 26 char upper[STRING_SIZE_MAX]; member
166 insn.upper[i] = toupper((unsigned char)insn.name[i]); in read_instructions()
216 printf("\tLONG_INSN_%s,\n", insn->upper); in print_long_insn()
226 printf("\t[LONG_INSN_%s] = \"%s\", \\\n", insn->upper, insn->name); in print_long_insn()
242 printf(".offset = LONG_INSN_%s ", insn->upper); in print_opcode()
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| /arch/powerpc/include/asm/ |
| D | time.h | 72 static inline void set_tb(unsigned int upper, unsigned int lower) in set_tb() argument
75 mtspr(SPRN_TBWU, upper); in set_tb()
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| /arch/riscv/net/ |
| D | bpf_jit_comp64.c | 135 s64 upper = (val + (1 << 11)) >> 12; in emit_imm() local
143 if (upper) in emit_imm()
144 emit_lui(rd, upper, ctx); in emit_imm()
146 if (!upper) { in emit_imm()
155 shift = __ffs(upper); in emit_imm()
156 upper >>= shift; in emit_imm()
159 emit_imm(rd, upper, ctx); in emit_imm()
249 s64 upper, lower; in emit_branch() local
277 upper = (rvoff + (1 << 11)) >> 12; in emit_branch()
281 emit(rv_auipc(RV_REG_T1, upper), ctx); in emit_branch()
[all …]
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| D | bpf_jit_comp32.c | 113 u32 upper = (imm + (1 << 11)) >> 12; in emit_imm() local
116 if (upper) { in emit_imm()
117 emit(rv_lui(rd, upper), ctx); in emit_imm()
230 s32 upper, lower; in emit_jump_and_link() local
237 upper = (rvoff + (1 << 11)) >> 12; in emit_jump_and_link()
239 emit(rv_auipc(RV_REG_T1, upper), ctx); in emit_jump_and_link()
746 u32 upper = ((u32)addr + (1 << 11)) >> 12; in emit_call() local
762 emit(rv_lui(RV_REG_T1, upper), ctx); in emit_call()
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| /arch/arm/lib/ |
| D | div64.S | 54 @ See if we need to handle upper 32-bit result.
59 @ Align divisor with upper part of dividend.
84 @ The division loop for needed upper bit positions.
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| /arch/c6x/lib/ |
| D | mpyll.S | 31 || mpy32u .m1x A5,B4,A3:A2 ; X1*Y0 (don't need upper 32-bits)
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| /arch/mips/pci/ |
| D | pci-octeon.c | 45 uint64_t upper:2; member
263 pci_addr.s.upper = 2; in octeon_read_config()
297 pci_addr.s.upper = 2; in octeon_write_config()
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| /arch/arm/mm/ |
| D | proc-v7-3level.S | 49 orr rpgdh, rpgdh, r2, lsl #(48 - 32) @ upper 32-bits of pgd
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| /arch/h8300/lib/ |
| D | udivsi3.S | 64 mulxu.w r0,er2 ; er2 = upper (AQ - 1) * divisor
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| /arch/powerpc/platforms/ |
| D | Kconfig | 229 The TAU hardware can compare the temperature to an upper and lower
230 bound. The default behavior is to show both the upper and lower
235 halfway between the upper and lower bounds, will be reported in
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| /arch/riscv/boot/dts/kendryte/ |
| D | k210.dtsi | 11 * wide, and the upper half of all addresses is ignored.
|