/arch/m68k/include/asm/ |
D | mcf8390.h | 30 #define BSWAP(w) (((w) << 8) | ((w) >> 8)) argument 31 #define RSWAP(w) (w) argument 81 #define BSWAP(w) (w) argument 84 #define RSWAP(w) (((w) << 8) | ((w) >> 8)) argument 95 #define BSWAP(w) (w) argument 98 #define RSWAP(w) (((w) << 8) | ((w) >> 8)) argument 107 #define BSWAP(w) (w) argument 110 #define RSWAP(w) (((w) << 8) | ((w) >> 8)) argument
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/arch/m68k/ifpsp060/src/ |
D | itest.S | 173 mov.w &0x0004,ICCR(%a6) 174 mov.w &0x0000,%cc 179 mov.w %cc,SCCR(%a6) 197 mov.w &0x0004,ICCR(%a6) 198 mov.w &0x0000,%cc 203 mov.w %cc,SCCR(%a6) 220 mov.w &0x0000,ICCR(%a6) 221 mov.w &0x0000,%cc 226 mov.w %cc,SCCR(%a6) 243 mov.w &0x0000,ICCR(%a6) [all …]
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/arch/x86/include/asm/ |
D | arch_hweight.h | 15 static __always_inline unsigned int __arch_hweight32(unsigned int w) in __arch_hweight32() argument 21 : REG_IN (w)); in __arch_hweight32() 26 static inline unsigned int __arch_hweight16(unsigned int w) in __arch_hweight16() argument 28 return __arch_hweight32(w & 0xffff); in __arch_hweight16() 31 static inline unsigned int __arch_hweight8(unsigned int w) in __arch_hweight8() argument 33 return __arch_hweight32(w & 0xff); in __arch_hweight8() 37 static inline unsigned long __arch_hweight64(__u64 w) in __arch_hweight64() argument 39 return __arch_hweight32((u32)w) + in __arch_hweight64() 40 __arch_hweight32((u32)(w >> 32)); in __arch_hweight64() 43 static __always_inline unsigned long __arch_hweight64(__u64 w) in __arch_hweight64() argument [all …]
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/arch/arm/mach-omap1/ |
D | lcd_dma.c | 134 u16 w; in set_b1_regs() local 253 w = omap_readw(OMAP1610_DMA_LCD_CSDP); in set_b1_regs() 254 w &= ~0x03; in set_b1_regs() 255 w |= lcd_dma.data_type; in set_b1_regs() 256 omap_writew(w, OMAP1610_DMA_LCD_CSDP); in set_b1_regs() 258 w = omap_readw(OMAP1610_DMA_LCD_CTRL); in set_b1_regs() 260 w &= ~(0x03 << 6); in set_b1_regs() 262 w |= 1 << 1; /* Block interrupt enable */ in set_b1_regs() 264 w &= ~(1 << 1); in set_b1_regs() 265 omap_writew(w, OMAP1610_DMA_LCD_CTRL); in set_b1_regs() [all …]
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/arch/mips/include/asm/ |
D | arch_hweight.h | 14 static inline unsigned int __arch_hweight32(unsigned int w) in __arch_hweight32() argument 16 return __builtin_popcount(w); in __arch_hweight32() 19 static inline unsigned int __arch_hweight16(unsigned int w) in __arch_hweight16() argument 21 return __builtin_popcount(w & 0xffff); in __arch_hweight16() 24 static inline unsigned int __arch_hweight8(unsigned int w) in __arch_hweight8() argument 26 return __builtin_popcount(w & 0xff); in __arch_hweight8() 29 static inline unsigned long __arch_hweight64(__u64 w) in __arch_hweight64() argument 31 return __builtin_popcountll(w); in __arch_hweight64()
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/arch/arm/mach-omap1/include/mach/ |
D | usb.h | 38 # define USB2_TRX_MODE(w) (((w)>>24)&0x07) argument 39 # define USB1_TRX_MODE(w) (((w)>>20)&0x07) argument 40 # define USB0_TRX_MODE(w) (((w)>>16)&0x07) argument 52 # define SRP_GPUVBUS(w) (((w)>>24)&0x07) argument 53 # define A_WAIT_VRISE(w) (((w)>>20)&0x07) argument 54 # define B_ASE_BRST(w) (((w)>>16)&0x07) argument 63 # define OTG_HMC(w) (((w)>>0)&0x3f) argument
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/arch/h8300/lib/ |
D | udivsi3.S | 7 mov.w A1E,A1E ; denominator top word 0? 11 mov.w A0E,A2 13 divxu.w A1,A2P 14 mov.w A2E,A0E 15 divxu.w A1,A0P 16 mov.w A0E,A3 17 mov.w A2,A0E 32 mov.w e2,e2 36 mov.w e2,e2 42 mov.w e2,e2 [all …]
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D | lshrdi3.c | 8 DWunion w; in __lshrdi3() local 14 w.s.high = 0; in __lshrdi3() 15 w.s.low = (UWtype) uu.s.high >> -bm; in __lshrdi3() 19 w.s.high = (UWtype) uu.s.high >> b; in __lshrdi3() 20 w.s.low = ((UWtype) uu.s.low >> b) | carries; in __lshrdi3() 23 return w.ll; in __lshrdi3()
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D | ashldi3.c | 9 DWunion w; in __ashldi3() local 15 w.s.low = 0; in __ashldi3() 16 w.s.high = (UWtype) uu.s.low << -bm; in __ashldi3() 20 w.s.low = (UWtype) uu.s.low << b; in __ashldi3() 21 w.s.high = ((UWtype) uu.s.high << b) | carries; in __ashldi3() 24 return w.ll; in __ashldi3()
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D | ashrdi3.c | 8 DWunion w; in __ashrdi3() local 15 w.s.high = uu.s.high >> (sizeof (Wtype) * BITS_PER_UNIT - 1); in __ashrdi3() 16 w.s.low = uu.s.high >> -bm; in __ashrdi3() 20 w.s.high = uu.s.high >> b; in __ashrdi3() 21 w.s.low = ((UWtype) uu.s.low >> b) | carries; in __ashrdi3() 24 return w.ll; in __ashrdi3()
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/arch/mips/kernel/ |
D | r4k-bugs64.c | 43 void mult_sh_align_mod(long *v1, long *v2, long *w, in mult_sh_align_mod() argument 115 *w = lw; in mult_sh_align_mod() 120 long v1[8], v2[8], w[8]; in check_mult_sh() local 134 mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0); in check_mult_sh() 135 mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1); in check_mult_sh() 136 mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2); in check_mult_sh() 137 mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3); in check_mult_sh() 138 mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4); in check_mult_sh() 139 mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5); in check_mult_sh() 140 mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6); in check_mult_sh() [all …]
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/arch/xtensa/mm/ |
D | tlb.c | 26 int w, i; in __flush_itlb_all() local 28 for (w = 0; w < ITLB_ARF_WAYS; w++) { in __flush_itlb_all() 30 int e = w + (i << PAGE_SHIFT); in __flush_itlb_all() 39 int w, i; in __flush_dtlb_all() local 41 for (w = 0; w < DTLB_ARF_WAYS; w++) { in __flush_dtlb_all() 43 int e = w + (i << PAGE_SHIFT); in __flush_dtlb_all() 222 static int check_tlb_entry(unsigned w, unsigned e, bool dtlb) in check_tlb_entry() argument 224 unsigned tlbidx = w | (e << PAGE_SHIFT); in check_tlb_entry() 238 dtlb ? 'D' : 'I', w, e, vpn, in check_tlb_entry() 246 dtlb ? 'D' : 'I', w, e, r0, r1, pte); in check_tlb_entry() [all …]
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/arch/arm64/include/asm/ |
D | cmpxchg.h | 21 #define __XCHG_CASE(w, sfx, name, sz, mb, nop_lse, acq, acq_lse, rel, cl) \ argument 30 "1: ld" #acq "xr" #sfx "\t%" #w "0, %2\n" \ 31 " st" #rel "xr" #sfx "\t%w1, %" #w "3, %2\n" \ 35 " swp" #acq_lse #rel #sfx "\t%" #w "3, %" #w "0, %2\n" \ 45 __XCHG_CASE(w, b, , 8, , , , , , ) 46 __XCHG_CASE(w, h, , 16, , , , , , ) 47 __XCHG_CASE(w, , , 32, , , , , , ) 49 __XCHG_CASE(w, b, acq_, 8, , , a, a, , "memory") 50 __XCHG_CASE(w, h, acq_, 16, , , a, a, , "memory") 51 __XCHG_CASE(w, , acq_, 32, , , a, a, , "memory") [all …]
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D | percpu.h | 66 #define __PERCPU_OP_CASE(w, sfx, name, sz, op_llsc, op_lse) \ argument 75 "1: ldxr" #sfx "\t%" #w "[tmp], %[ptr]\n" \ 76 #op_llsc "\t%" #w "[tmp], %" #w "[tmp], %" #w "[val]\n" \ 77 " stxr" #sfx "\t%w[loop], %" #w "[tmp], %[ptr]\n" \ 80 #op_lse "\t%" #w "[val], %[ptr]\n" \ 87 #define __PERCPU_RET_OP_CASE(w, sfx, name, sz, op_llsc, op_lse) \ argument 96 "1: ldxr" #sfx "\t%" #w "[ret], %[ptr]\n" \ 97 #op_llsc "\t%" #w "[ret], %" #w "[ret], %" #w "[val]\n" \ 98 " stxr" #sfx "\t%w[loop], %" #w "[ret], %[ptr]\n" \ 101 #op_lse "\t%" #w "[val], %" #w "[ret], %[ptr]\n" \ [all …]
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/arch/x86/lib/ |
D | hweight.S | 14 movl %edi, %eax # w 17 movl %eax, %edx # w -> t 20 subl %edx, %eax # w -= t 22 movl %eax, %edx # w -> t 26 addl %edx, %eax # w = w_tmp + t 28 movl %eax, %edx # w -> t 33 shrl $24, %eax # w = w_tmp >> 24 44 movq %rdi, %rdx # w -> t 49 subq %rax, %rdi # w -= t 51 movq %rdi, %rax # w -> t [all …]
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/arch/sh/lib/ |
D | lshrdi3.c | 8 DWunion uu, w; in __lshrdi3() local 18 w.s.high = 0; in __lshrdi3() 19 w.s.low = (unsigned int) uu.s.high >> -bm; in __lshrdi3() 23 w.s.high = (unsigned int) uu.s.high >> b; in __lshrdi3() 24 w.s.low = ((unsigned int) uu.s.low >> b) | carries; in __lshrdi3() 27 return w.ll; in __lshrdi3()
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D | ashldi3.c | 8 DWunion uu, w; in __ashldi3() local 18 w.s.low = 0; in __ashldi3() 19 w.s.high = (unsigned int) uu.s.low << -bm; in __ashldi3() 23 w.s.low = (unsigned int) uu.s.low << b; in __ashldi3() 24 w.s.high = ((unsigned int) uu.s.high << b) | carries; in __ashldi3() 27 return w.ll; in __ashldi3()
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D | ashrdi3.c | 8 DWunion uu, w; in __ashrdi3() local 19 w.s.high = in __ashrdi3() 21 w.s.low = uu.s.high >> -bm; in __ashrdi3() 25 w.s.high = uu.s.high >> b; in __ashrdi3() 26 w.s.low = ((unsigned int) uu.s.low >> b) | carries; in __ashrdi3() 29 return w.ll; in __ashrdi3()
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/arch/microblaze/lib/ |
D | lshrdi3.c | 8 DWunion uu, w; in __lshrdi3() local 18 w.s.high = 0; in __lshrdi3() 19 w.s.low = (unsigned int) uu.s.high >> -bm; in __lshrdi3() 23 w.s.high = (unsigned int) uu.s.high >> b; in __lshrdi3() 24 w.s.low = ((unsigned int) uu.s.low >> b) | carries; in __lshrdi3() 27 return w.ll; in __lshrdi3()
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D | ashldi3.c | 8 DWunion uu, w; in __ashldi3() local 18 w.s.low = 0; in __ashldi3() 19 w.s.high = (unsigned int) uu.s.low << -bm; in __ashldi3() 23 w.s.low = (unsigned int) uu.s.low << b; in __ashldi3() 24 w.s.high = ((unsigned int) uu.s.high << b) | carries; in __ashldi3() 27 return w.ll; in __ashldi3()
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D | ashrdi3.c | 8 DWunion uu, w; in __ashrdi3() local 19 w.s.high = in __ashrdi3() 21 w.s.low = uu.s.high >> -bm; in __ashrdi3() 25 w.s.high = uu.s.high >> b; in __ashrdi3() 26 w.s.low = ((unsigned int) uu.s.low >> b) | carries; in __ashrdi3() 29 return w.ll; in __ashrdi3()
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/arch/sparc/include/asm/ |
D | ide.h | 49 u32 w; in __ide_insw() local 51 w = __raw_readw(port) << 16; in __ide_insw() 52 w |= __raw_readw(port); in __ide_insw() 53 *pi++ = w; in __ide_insw() 79 u32 w; in __ide_outsw() local 81 w = *pi++; in __ide_outsw() 82 __raw_writew((w >> 16), port); in __ide_outsw() 83 __raw_writew(w, port); in __ide_outsw()
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/arch/m68k/math-emu/ |
D | fp_move.S | 48 move.w %d0,%d1 | store data size twice in %d1 50 move.w %d0,%d1 54 move.b (%a0,%d1.w),%d0 75 move.w %d0,%d1 86 jmp ([0f:w,%pc,%d1.w*4]) 100 move.w %d2,%d0 103 move.w %d2,%d1 112 move.w %d2,%d0 114 move.w %d1,%d0 123 move.w %d2,%d1 [all …]
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D | fp_decode.h | 74 jmp ([0f:w,%pc,%d0*4]) 86 jmp ([0f:w,%pc,%d0*4]) 116 jmp ([0f:w,%pc,%d0*4]) 136 ext.w %d0 157 move.w %d2,%d1 | scale factor 158 rol.w #7,%d1 159 and.w #3,%d1 170 jmp ([0f:w,%pc,%d0*4]) 180 jmp ([0f:w,%pc,%d0*4]) 231 move.w #6,%d1 [all …]
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/arch/m68k/lib/ |
D | ashldi3.c | 37 DIunion w; in __ashldi3() local 49 w.s.low = 0; in __ashldi3() 50 w.s.high = (USItype)uu.s.low << -bm; in __ashldi3() 55 w.s.low = (USItype)uu.s.low << b; in __ashldi3() 56 w.s.high = ((USItype)uu.s.high << b) | carries; in __ashldi3() 59 return w.ll; in __ashldi3()
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