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Searched refs:AR_SREV_9300_20_OR_LATER (Results 1 – 12 of 12) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dreg.h23 #define AR_CR_RXE (AR_SREV_9300_20_OR_LATER(ah) ? 0x0000000c : 0x00000004)
355 #define AR_ISR_S2_S (AR_SREV_9300_20_OR_LATER(ah) ? 0x00d0 : 0x00cc)
356 #define AR_ISR_S3_S (AR_SREV_9300_20_OR_LATER(ah) ? 0x00d4 : 0x00d0)
357 #define AR_ISR_S4_S (AR_SREV_9300_20_OR_LATER(ah) ? 0x00d8 : 0x00d4)
358 #define AR_ISR_S5_S (AR_SREV_9300_20_OR_LATER(ah) ? 0x00dc : 0x00d8)
891 #define AR_SREV_9300_20_OR_LATER(_ah) \ macro
1178 (AR_SREV_9300_20_OR_LATER(ah) ? 0x4050 : 0x404c))
1201 (AR_SREV_9300_20_OR_LATER(ah) ? 0x4058 : 0x4050))
1206 (AR_SREV_9300_20_OR_LATER(ah) ? 0x405c : 0x4054))
1225 (AR_SREV_9300_20_OR_LATER(ah) ? 0x4060 : 0x4058))
[all …]
Dhw.c355 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_chip_test()
406 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_init_config()
478 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_init_defaults()
527 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_post_init()
547 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_post_init()
560 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_attach_ops()
609 if (AR_SREV_9300_20_OR_LATER(ah)) { in __ath9k_hw_init()
947 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_init_interrupt_masks()
998 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_init_interrupt_masks()
1203 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_set_dma()
[all …]
Dbtcoex.c79 if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_init_btcoex_hw()
152 } else if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_init_scheme()
283 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_set_weight()
339 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_enable_3wire()
428 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_btcoex_disable()
438 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_disable()
456 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_btcoex_bt_stomp()
Dani.c193 else if (AR_SREV_9300_20_OR_LATER(ah) && in ath9k_hw_set_ofdm_nil()
198 else if (!AR_SREV_9300_20_OR_LATER(ah) && in ath9k_hw_set_ofdm_nil()
206 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_set_ofdm_nil()
263 if (!AR_SREV_9300_20_OR_LATER(ah) || AR_SREV_9485(ah) || in ath9k_hw_set_cck_nil()
484 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_ani_init()
498 ani->mrcCCK = AR_SREV_9300_20_OR_LATER(ah) ? true : false; in ath9k_hw_ani_init()
Drng.c117 if (!AR_SREV_9300_20_OR_LATER(ah)) in ath9k_rng_start()
Dmac.c461 if (AR_SREV_9300_20_OR_LATER(ah) && in ath9k_hw_resettxqueue()
504 if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_resettxqueue()
713 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_stopdmarecv()
948 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath9k_hw_set_interrupts()
Dcommon-init.c198 else if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_cmn_setup_ht_cap()
Deeprom.c665 if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_hw_eeprom_init()
Dmain.c224 if (AR_SREV_9300_20_OR_LATER(ah)) { in ath_prepare_reset()
714 if (AR_SREV_9300_20_OR_LATER(ah)) in ath9k_start()
2332 if (AR_SREV_9300_20_OR_LATER(ah)) in validate_antenna_mask()
Dar9003_calib.c321 if (AR_SREV_9300_20_OR_LATER(ah)) { in ar9003_hw_init_cal_settings()
Ddebug.c931 max_reg_offset = AR_SREV_9300_20_OR_LATER(sc->sc_ah) ? 0x8800 : 0xb500; in open_file_regdump()
Dxmit.c1146 if (!AR_SREV_9300_20_OR_LATER(ah)) { in ath_get_rate_txpower()