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Searched refs:CG_CGLS_TILE_10 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/radeon/
Dcypress_dpm.c139 WREG32_CG(CG_CGLS_TILE_10, 0xFFFFFFFF); in cypress_gfx_clock_gating_enable()
166 WREG32_CG(CG_CGLS_TILE_10, 0); in cypress_gfx_clock_gating_enable()
Devergreend.h249 #define CG_CGLS_TILE_10 0x2a macro