Searched refs:CLR (Results 1 – 11 of 11) sorted by relevance
| /drivers/clk/imx/ |
| D | clk-pfd.c | 32 #define CLR 0x8 macro
39 writel_relaxed(1 << ((pfd->idx + 1) * 8 - 1), pfd->reg + CLR); in clk_pfd_enable()
99 writel_relaxed(0x3f << (pfd->idx * 8), pfd->reg + CLR); in clk_pfd_set_rate()
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| /drivers/clk/mxs/ |
| D | clk-pll.c | 47 writel_relaxed(1 << pll->power, pll->base + CLR); in clk_pll_unprepare()
54 writel_relaxed(1 << 31, pll->base + CLR); in clk_pll_enable()
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| D | clk-imx23.c | 52 writel_relaxed(1 << BP_CLKSEQ_BYPASS_SAIF, CLKSEQ + CLR); in clk_misc_init()
63 writel_relaxed(1 << BP_CLKSEQ_BYPASS_SSP, CLKSEQ + CLR); in clk_misc_init()
69 writel_relaxed(0x3f << BP_FRAC_IOFRAC, FRAC + CLR); in clk_misc_init()
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| D | clk-imx28.c | 73 writel_relaxed(0x3 << BP_SAIF_CLKMUX, DIGCTRL + CLR); in mxs_saif_clkmux_select()
90 writel_relaxed(0x3 << BP_CLKSEQ_BYPASS_SAIF0, CLKSEQ + CLR); in clk_misc_init()
110 writel_relaxed(0xf << BP_CLKSEQ_BYPASS_SSP0, CLKSEQ + CLR); in clk_misc_init()
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| D | clk.h | 15 #define CLR 0x8 macro
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| D | clk-ref.c | 35 writel_relaxed(1 << ((ref->idx + 1) * 8 - 1), ref->reg + CLR); in clk_ref_enable()
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| /drivers/pwm/ |
| D | pwm-mxs.c | 18 #define CLR 0x8 macro
69 writel(1 << pwm->hwpwm, mxs->base + PWM_CTRL + CLR); in mxs_pwm_apply()
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| /drivers/gpu/drm/imx/dcss/ |
| D | dcss-dev.h | 14 #define CLR 0x08 macro
20 #define dcss_clr(v, c) writel((v), (c) + CLR)
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| /drivers/pinctrl/freescale/ |
| D | pinctrl-mxs.h | 13 #define CLR 0x8 macro
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| D | pinctrl-mxs.c | 293 writel(1 << shift, reg + CLR); in mxs_pinconf_group_set()
304 writel(1 << shift, reg + CLR); in mxs_pinconf_group_set()
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| /drivers/video/fbdev/ |
| D | imsttfb.c | 50 CLR = 6, /* 0x18 */ enumerator
1014 write_reg_le32(par->dc_regs, CLR, bgc); in imsttfb_fillrect()
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