Searched refs:CN6XXX_LMC0_RESET_CTL_DDR3RST_MASK (Results 1 – 2 of 2) sorted by relevance
528 #define CN6XXX_LMC0_RESET_CTL_DDR3RST_MASK 0x0000000000000001ULL macro
1387 (lmc0_reset_ctl & CN6XXX_LMC0_RESET_CTL_DDR3RST_MASK); in octeon_mem_access_ok()