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Searched refs:CPTX_PF_ECC0_ENA_W1C (Results 1 – 2 of 2) sorted by relevance

/drivers/crypto/cavium/cpt/
Dcpt_common.h48 #define CPTX_PF_ECC0_ENA_W1C(a) (0x250ll + ((u64)(a) << 36)) macro
Dcptpf_main.c101 cpt_write_csr64(cpt->reg_base, CPTX_PF_ECC0_ENA_W1C(0), ~0ull); in cpt_disable_ecc_interrupts()