| /drivers/pinctrl/aspeed/ |
| D | pinctrl-aspeed-g5.c | 1211 #define D5 162 macro
1212 SIG_EXPR_LIST_DECL_SINGLE(D5, GPIOU2, GPIOU2, SIG_DESC_SET(SCUA0, 10));
1213 SIG_EXPR_LIST_DECL_SINGLE(D5, RMII2DASH0, RMII2, RMII2_DESC);
1214 SIG_EXPR_LIST_DECL_SINGLE(D5, RGMII2TXD2, RGMII2);
1215 PIN_DECL_(D5, SIG_EXPR_LIST_PTR(D5, GPIOU2), SIG_EXPR_LIST_PTR(D5, RMII2DASH0),
1216 SIG_EXPR_LIST_PTR(D5, RGMII2TXD2));
1312 FUNC_GROUP_DECL(RGMII2, B2, B1, A2, B3, D5, D4, C2, C1, C3, D1, D2, E6);
1989 ASPEED_PINCTRL_PIN(D5),
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| D | pinctrl-aspeed-g4.c | 113 #define D5 7 macro
114 SIG_EXPR_LIST_DECL_SINGLE(D5, MDIO2, MDIO2, MDIO2_DESC);
115 SIG_EXPR_LIST_DECL_SINGLE(D5, TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7));
116 PIN_DECL_2(D5, GPIOA7, MDIO2, TIMER8);
118 FUNC_GROUP_DECL(TIMER8, D5);
119 FUNC_GROUP_DECL(MDIO2, A3, D5);
1999 ASPEED_PINCTRL_PIN(D5),
2442 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, D6, D5, SCU8C, 16),
2443 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, D6, D5, SCU8C, 16),
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| D | pinctrl-aspeed-g6.c | 1295 #define D5 210 macro
1296 SIG_EXPR_LIST_DECL_SESG(D5, RGMII1TXD0, RGMII1, SIG_DESC_SET(SCU400, 2),
1298 SIG_EXPR_LIST_DECL_SESG(D5, RMII1TXD0, RMII1, SIG_DESC_SET(SCU400, 2),
1300 PIN_DECL_2(D5, GPIO18A2, RGMII1TXD0, RMII1TXD0);
1359 FUNC_GROUP_DECL(RGMII1, C6, D6, D5, A3, C5, E6, B3, A2, B2, B1, C4, E5);
1360 FUNC_GROUP_DECL(RMII1, C6, D6, D5, A3, B3, B2, B1, C4, E5);
1785 ASPEED_PINCTRL_PIN(D5),
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| /drivers/pinctrl/renesas/ |
| D | pfc-r8a77970.c | 199 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_D0) F_(0, 0) F_(0, 0) F…
585 PINMUX_IPSR_GPSR(IP5_27_24, D5),
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| D | pfc-r8a77980.c | 232 #define IP5_27_24 FM(VI1_DATA2) FM(CANFD0_TX_B) F_(0, 0) FM(D5) FM(MMC_DS) F_(0, 0) F_(0, 0) F…
663 PINMUX_IPSR_GPSR(IP5_27_24, D5),
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| D | pfc-r8a77990.c | 80 #define GPSR0_5 F_(D5, IP6_11_8)
266 #define IP6_11_8 FM(D5) FM(RX3_A) FM(HRX3_B) F_(0, 0) F_(0, 0) FM(DU_DR5) FM(VI4_DATA4_B) F_(…
871 PINMUX_IPSR_GPSR(IP6_11_8, D5),
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| D | pfc-sh7734.c | 745 PINMUX_IPSR_GPSR(IP2_4_3, D5),
1422 GPIO_FN(D5), GPIO_FN(SD0_WP_A), GPIO_FN(MMC_D5_A), GPIO_FN(FD5_A),
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| D | pfc-r8a77950.c | 92 #define GPSR0_5 F_(D5, IP6_3_0)
304 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, …
948 PINMUX_IPSR_GPSR(IP6_3_0, D5),
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| D | pfc-r8a77951.c | 92 #define GPSR0_5 F_(D5, IP6_3_0)
305 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, …
955 PINMUX_IPSR_GPSR(IP6_3_0, D5),
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| D | pfc-r8a7796.c | 97 #define GPSR0_5 F_(D5, IP6_3_0)
310 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, …
959 PINMUX_IPSR_GPSR(IP6_3_0, D5),
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| D | pfc-r8a77965.c | 97 #define GPSR0_5 F_(D5, IP6_3_0)
310 #define IP6_3_0 FM(D5) FM(MSIOF2_SYNC_B)F_(0, 0) F_(0, 0) FM(VI4_DATA21) FM(VI5_DATA5) F_(0, …
961 PINMUX_IPSR_GPSR(IP6_3_0, D5),
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| D | pfc-r8a7792.c | 352 PINMUX_SINGLE(D5),
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| D | pfc-sh7264.c | 1299 GPIO_FN(D5),
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| D | pfc-r8a73a4.c | 357 F1(D5), F2(VIO_D5), F5(GIO_OUT5_217),
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| D | pfc-sh7724.c | 1404 GPIO_FN(D5),
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| D | pfc-sh7757.c | 1659 GPIO_FN(D5),
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| D | pfc-sh7269.c | 1737 GPIO_FN(D5),
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| D | pfc-r8a77470.c | 598 PINMUX_IPSR_GPSR(IP1_31_28, D5),
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| D | pfc-r8a7778.c | 693 PINMUX_IPSR_NOGP(IP2_23, D5),
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| D | pfc-r8a7794.c | 741 PINMUX_IPSR_GPSR(IP0_31_30, D5),
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| D | pfc-r8a7791.c | 816 PINMUX_IPSR_GPSR(IP0_5, D5),
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| D | pfc-r8a7790.c | 829 PINMUX_IPSR_GPSR(IP0_19_16, D5),
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| /drivers/pinctrl/ |
| D | pinctrl-pic32.c | 1003 PIC32_PINCTRL_GROUP(53, D5,
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