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Searched refs:DEFAULT_CACHELINE (Results 1 – 2 of 2) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dpci.c797 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */ in ath_pci_read_cachesize()
Dath9k.h968 #define DEFAULT_CACHELINE 32 macro