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Searched refs:DISPC_CONTROL3 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/omapdrm/dss/
Ddispc.h26 #define DISPC_CONTROL3 0x0848 macro
Ddispc.c329 [DISPC_MGR_FLD_ENABLE] = { DISPC_CONTROL3, 0, 0 },
330 [DISPC_MGR_FLD_STNTFT] = { DISPC_CONTROL3, 3, 3 },
331 [DISPC_MGR_FLD_GO] = { DISPC_CONTROL3, 5, 5 },
332 [DISPC_MGR_FLD_TFTDATALINES] = { DISPC_CONTROL3, 9, 8 },
333 [DISPC_MGR_FLD_STALLMODE] = { DISPC_CONTROL3, 11, 11 },
3476 DUMPREG(dispc, DISPC_CONTROL3); in dispc_dump_regs()
/drivers/video/fbdev/omap2/omapfb/dss/
Ddispc.h28 #define DISPC_CONTROL3 0x0848 macro
Ddispc.c225 [DISPC_MGR_FLD_ENABLE] = { DISPC_CONTROL3, 0, 0 },
226 [DISPC_MGR_FLD_STNTFT] = { DISPC_CONTROL3, 3, 3 },
227 [DISPC_MGR_FLD_GO] = { DISPC_CONTROL3, 5, 5 },
228 [DISPC_MGR_FLD_TFTDATALINES] = { DISPC_CONTROL3, 9, 8 },
229 [DISPC_MGR_FLD_STALLMODE] = { DISPC_CONTROL3, 11, 11 },
3424 DUMPREG(DISPC_CONTROL3); in dispc_dump_regs()