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Searched refs:DPCLKA_CFGCR0 (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_ddi.c3085 val = intel_de_read(dev_priv, DPCLKA_CFGCR0); in intel_ddi_clk_select()
3088 intel_de_write(dev_priv, DPCLKA_CFGCR0, val); in intel_ddi_clk_select()
3095 val = intel_de_read(dev_priv, DPCLKA_CFGCR0); in intel_ddi_clk_select()
3097 intel_de_write(dev_priv, DPCLKA_CFGCR0, val); in intel_ddi_clk_select()
3129 intel_de_write(dev_priv, DPCLKA_CFGCR0, in intel_ddi_clk_disable()
3130 intel_de_read(dev_priv, DPCLKA_CFGCR0) | DPCLKA_CFGCR0_DDI_CLK_OFF(port)); in intel_ddi_clk_disable()
Dintel_display.c10845 temp = intel_de_read(dev_priv, DPCLKA_CFGCR0) & DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); in cnl_get_ddi_pll()
/drivers/gpu/drm/i915/
Di915_reg.h10283 #define DPCLKA_CFGCR0 _MMIO(0x6C200) macro