Searched refs:DPCLKA_CFGCR0 (Results 1 – 3 of 3) sorted by relevance
/drivers/gpu/drm/i915/display/ |
D | intel_ddi.c | 3085 val = intel_de_read(dev_priv, DPCLKA_CFGCR0); in intel_ddi_clk_select() 3088 intel_de_write(dev_priv, DPCLKA_CFGCR0, val); in intel_ddi_clk_select() 3095 val = intel_de_read(dev_priv, DPCLKA_CFGCR0); in intel_ddi_clk_select() 3097 intel_de_write(dev_priv, DPCLKA_CFGCR0, val); in intel_ddi_clk_select() 3129 intel_de_write(dev_priv, DPCLKA_CFGCR0, in intel_ddi_clk_disable() 3130 intel_de_read(dev_priv, DPCLKA_CFGCR0) | DPCLKA_CFGCR0_DDI_CLK_OFF(port)); in intel_ddi_clk_disable()
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D | intel_display.c | 10845 temp = intel_de_read(dev_priv, DPCLKA_CFGCR0) & DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port); in cnl_get_ddi_pll()
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/drivers/gpu/drm/i915/ |
D | i915_reg.h | 10283 #define DPCLKA_CFGCR0 _MMIO(0x6C200) macro
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