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Searched refs:DPP_INT_MSK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/hisilicon/kirin/
Dkirin_dpe_reg.h201 #define DPP_INT_MSK (0x0044) macro
Dkirin_drm_dpe.c249 writel(mask, base + DPE_DPP_OFFSET + DPP_INT_MSK); in dpe_interrupt_mask()
1055 isr_s2_dpp &= ~(readl(base + DPE_DPP_OFFSET + DPP_INT_MSK)); in dpe_irq_handler()