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Searched refs:DP_PLL_DATA_RATE_RBR (Results 1 – 1 of 1) sorted by relevance

/drivers/phy/rockchip/
Dphy-rockchip-typec.c324 #define DP_PLL_DATA_RATE_RBR ((2 << 12) | (4 << 8)) macro
497 writel(DP_PLL_CLOCK_ENABLE | DP_PLL_ENABLE | DP_PLL_DATA_RATE_RBR, in tcphy_cfg_dp_pll()