Searched refs:DP_SEC_GSP2_ENABLE (Results 1 – 6 of 6) sorted by relevance
/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_stream_encoder.h | 157 SE_SF(DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, mask_sh),\ 240 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, mask_sh),\ 431 uint8_t DP_SEC_GSP2_ENABLE; member 562 uint32_t DP_SEC_GSP2_ENABLE; member
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D | dce_stream_encoder.c | 880 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, info_frame->spd.valid); in dce110_stream_encoder_update_dp_info_packets() 906 DP_SEC_GSP2_ENABLE, 0, in dce110_stream_encoder_stop_dp_info_packets()
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/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_stream_encoder.h | 214 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, mask_sh),\ 412 type DP_SEC_GSP2_ENABLE;\
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D | dcn10_stream_encoder.c | 738 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, info_frame->spd.valid); in enc1_stream_encoder_update_dp_info_packets() 858 DP_SEC_GSP2_ENABLE, 0, in enc1_stream_encoder_stop_dp_info_packets()
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/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_dio_stream_encoder.h | 131 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, mask_sh),\
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D | dcn30_dio_stream_encoder.c | 454 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, info_frame->spd.valid); in enc3_stream_encoder_update_dp_info_packets()
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