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Searched refs:DWB_OGAM_RAMA_START_BASE_CNTL_G (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dwb.h88 SR(DWB_OGAM_RAMA_START_BASE_CNTL_G),\
246 …SF_DWB2(DWB_OGAM_RAMA_START_BASE_CNTL_G, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_BASE_G, mask_sh)…
793 uint32_t DWB_OGAM_RAMA_START_BASE_CNTL_G; member
Ddcn30_dwb_cm.c93 gam_regs.start_base_cntl_g = REG(DWB_OGAM_RAMA_START_BASE_CNTL_G); in dwb3_program_ogam_luta_settings()