Home
last modified time | relevance | path

Searched refs:DWB_OGAM_RAMB_START_BASE_CNTL_R (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dwb.h125 SR(DWB_OGAM_RAMB_START_BASE_CNTL_R),\
340 …SF_DWB2(DWB_OGAM_RAMB_START_BASE_CNTL_R, DWBCP, 0, DWB_OGAM_RAMB_EXP_REGION_START_BASE_R, mask_sh)…
830 uint32_t DWB_OGAM_RAMB_START_BASE_CNTL_R; member
Ddcn30_dwb_cm.c127 gam_regs.start_base_cntl_r = REG(DWB_OGAM_RAMB_START_BASE_CNTL_R); in dwb3_program_ogam_lutb_settings()