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Searched refs:ENGINE_READ_FW (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/i915/gt/
Dselftest_gt_pm.c49 cycles[i] = -ENGINE_READ_FW(engine, RING_TIMESTAMP); in measure_clocks()
55 cycles[i] += ENGINE_READ_FW(engine, RING_TIMESTAMP); in measure_clocks()
Dintel_engine.h60 #define ENGINE_READ_FW(...) __ENGINE_READ_OP(read_fw, __VA_ARGS__) macro
Dintel_gt_irq.c46 ENGINE_READ_FW(engine, RING_EXECLIST_STATUS_HI)); in cs_irq_handler()
Dintel_lrc.c3041 return ENGINE_READ_FW(engine, RING_EXECLIST_STATUS_HI); in active_ccid()
4157 if (ENGINE_READ_FW(engine, RING_MI_MODE) & STOP_RING) { in unexpected_starting_state()
/drivers/gpu/drm/i915/selftests/
Di915_request.c1674 cycles = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP); in measure_semaphore_response()
1744 elapsed[i] = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP); in measure_idle_dispatch()
1819 elapsed[i - 1] = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP); in measure_busy_dispatch()
2135 elapsed[i - 1] = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP); in measure_preemption()
2238 elapsed[i - 1] = ENGINE_READ_FW(ce->engine, RING_TIMESTAMP); in measure_completion()
/drivers/gpu/drm/i915/
Di915_pmu.c290 val = ENGINE_READ_FW(engine, RING_CTL); in engine_sample()
312 val = ENGINE_READ_FW(engine, RING_MI_MODE); in engine_sample()