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Searched refs:GET_BITFIELD (Results 1 – 6 of 6) sorted by relevance

/drivers/edac/
Dskx_base.c174 return !!GET_BITFIELD(mcmtr, 2, 2); in skx_check_ecc()
221 #define SKX_SAD_MOD3MODE(sad) GET_BITFIELD((sad), 30, 31)
222 #define SKX_SAD_MOD3(sad) GET_BITFIELD((sad), 27, 27)
223 #define SKX_SAD_LIMIT(sad) (((u64)GET_BITFIELD((sad), 7, 26) << 26) | MASK26)
224 #define SKX_SAD_MOD3ASMOD2(sad) GET_BITFIELD((sad), 5, 6)
225 #define SKX_SAD_ATTR(sad) GET_BITFIELD((sad), 3, 4)
226 #define SKX_SAD_INTERLEAVE(sad) GET_BITFIELD((sad), 1, 2)
227 #define SKX_SAD_ENABLE(sad) GET_BITFIELD((sad), 0, 0)
299 idx = GET_BITFIELD(addr, 6, 8); in skx_sad_decode()
302 idx = GET_BITFIELD(addr, 8, 10); in skx_sad_decode()
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Dsb_edac.c51 #define GET_BITFIELD(v, lo, hi) \ macro
75 #define DRAM_RULE_ENABLE(reg) GET_BITFIELD(reg, 0, 0)
76 #define A7MODE(reg) GET_BITFIELD(reg, 26, 26)
146 return GET_BITFIELD(reg, table[interleave].start, in sad_pkg()
161 #define GET_TOLM(reg) ((GET_BITFIELD(reg, 0, 3) << 28) | 0x3ffffff)
162 #define GET_TOHM(reg) ((GET_BITFIELD(reg, 0, 20) << 25) | 0x3ffffff)
168 #define SOURCE_ID(reg) GET_BITFIELD(reg, 9, 11)
170 #define SOURCE_ID_KNL(reg) GET_BITFIELD(reg, 12, 14)
183 #define TAD_LIMIT(reg) ((GET_BITFIELD(reg, 12, 31) << 26) | 0x3ffffff)
184 #define TAD_SOCK(reg) GET_BITFIELD(reg, 10, 11)
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Dskx_common.c169 *id = GET_BITFIELD(reg, 12, 14); in skx_get_src_id()
182 *id = GET_BITFIELD(reg, 0, 2); in skx_get_node_id()
188 switch (GET_BITFIELD(mtr, 8, 9)) { in get_width()
230 d->bus[0] = GET_BITFIELD(reg, 0, 7); in skx_get_all_bus_mappings()
231 d->bus[1] = GET_BITFIELD(reg, 8, 15); in skx_get_all_bus_mappings()
234 d->bus[2] = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings()
235 d->bus[3] = GET_BITFIELD(reg, 24, 31); in skx_get_all_bus_mappings()
237 d->seg = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings()
293 u32 val = GET_BITFIELD(reg, lobit, hibit); in skx_get_dimm_attr()
326 imc->chan[chan].dimms[dimmno].close_pg = GET_BITFIELD(mcmtr, 0, 0); in skx_get_dimm_info()
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Di10nm_base.c34 #define I10NM_GET_SCK_MMIO_BASE(reg) (GET_BITFIELD(reg, 0, 28) << 23)
35 #define I10NM_GET_IMC_MMIO_OFFSET(reg) (GET_BITFIELD(reg, 0, 10) << 12)
36 #define I10NM_GET_IMC_MMIO_SIZE(reg) ((GET_BITFIELD(reg, 13, 23) - \
37 GET_BITFIELD(reg, 0, 10) + 1) << 12)
156 return !!GET_BITFIELD(mcmtr, 2, 2); in i10nm_check_ecc()
Dskx_common.h26 #define GET_BITFIELD(v, lo, hi) \ macro
42 #define IS_DIMM_PRESENT(r) GET_BITFIELD(r, 15, 15)
43 #define IS_NVDIMM_PRESENT(r, i) GET_BITFIELD(r, i, i)
Dpnd2_edac.c123 #define GET_BITFIELD(v, lo, hi) (((v) & GENMASK_ULL(hi, lo)) >> (lo)) macro
1152 u32 core_err_cnt = GET_BITFIELD(m->status, 38, 52); in pnd2_mce_output_error()
1153 u32 mscod = GET_BITFIELD(m->status, 16, 31); in pnd2_mce_output_error()
1154 u32 errcode = GET_BITFIELD(m->status, 0, 15); in pnd2_mce_output_error()
1155 u32 optypenum = GET_BITFIELD(m->status, 4, 6); in pnd2_mce_output_error()