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Searched refs:HCLGE_PHY_CSC_REG (Results 1 – 2 of 2) sorted by relevance

/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_main.h133 #define HCLGE_PHY_CSC_REG 16 macro
Dhclge_main.c9684 retval = phy_read(phydev, HCLGE_PHY_CSC_REG); in hclge_get_mdix_mode()