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Searched refs:HCLGE_SSU_PORT_INT_MSIX_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_err.h85 #define HCLGE_SSU_PORT_INT_MSIX_MASK 0x7BFF macro
Dhclge_err.c1850 status = le32_to_cpu(desc[0].data[0]) & HCLGE_SSU_PORT_INT_MSIX_MASK; in hclge_handle_pf_msix_error()