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Searched refs:IS_HASWELL (Results 1 – 25 of 38) sorted by relevance

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/drivers/gpu/drm/i915/
Dintel_pch.c32 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
39 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
46 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
54 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()
172 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_virt_detect_pch()
Di915_cmd_parser.c954 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
963 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
987 } else if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
999 } else if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()
1540 if (IS_HASWELL(engine->i915)) in intel_engine_cmd_parser()
Di915_drv.h1410 #define IS_HASWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_HASWELL) macro
1424 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
1434 #define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \
1436 #define IS_HSW_GT1(dev_priv) (IS_HASWELL(dev_priv) && \
1641 #define HAS_WT(dev_priv) ((IS_HASWELL(dev_priv) || \
Dintel_device_info.c340 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_device_info_subplatform_init()
Dintel_dram.c559 if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || INTEL_GEN(i915) >= 9)) in intel_dram_edram_detect()
/drivers/gpu/drm/i915/gt/
Dintel_llc.c96 } else if (IS_HASWELL(i915)) { in calc_ia_freq()
Dgen7_renderclear.c57 if (IS_HASWELL(i915)) { in batch_get_defaults()
390 IS_HASWELL(i915) ? in emit_batch()
Dintel_rps.c752 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in gen6_rps_set()
977 if (IS_HASWELL(i915) || IS_BROADWELL(i915) || in gen6_rps_init()
1818 if (IS_GEN(i915, 6) || IS_IVYBRIDGE(i915) || IS_HASWELL(i915)) { in intel_rps_init()
1869 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in intel_rps_get_cagf()
Dintel_ring_submission.c664 IS_HASWELL(i915) ? engine->gt->info.num_engines - 1 : 0; in mi_set_context()
1127 if (IS_HASWELL(i915)) in setup_rcs()
Dgen6_ppgtt.c37 if (IS_HASWELL(i915)) { in gen7_ppgtt_enable()
Dintel_gt.c100 if (IS_HASWELL(i915)) in intel_gt_init_hw()
Ddebugfs_gt_pm.c327 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in frequency_show()
Dintel_sseu.c588 if (IS_HASWELL(i915)) in intel_sseu_info_init()
/drivers/gpu/drm/i915/selftests/
Digt_spinner.c159 else if (IS_HASWELL(rq->engine->i915)) in igt_spinner_create_request()
/drivers/gpu/drm/i915/display/
Dintel_psr.c489 if (IS_HASWELL(dev_priv)) in hsw_activate_psr1()
899 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_psr_enable_source()
1577 if (IS_HASWELL(dev_priv)) in intel_psr_init()
1590 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_psr_init()
Dintel_fbc.c659 } else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv)) { in intel_fbc_hw_tracking_covers_screen()
708 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_fbc_update_state_cache()
878 if ((IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) && in intel_fbc_can_activate()
Dintel_display_power.c4652 } else if (IS_HASWELL(dev_priv)) { in intel_power_domains_init()
4828 if (IS_HASWELL(dev_priv)) in assert_can_disable_lcpll()
4849 if (IS_HASWELL(dev_priv)) in hsw_read_dcomp()
4857 if (IS_HASWELL(dev_priv)) { in hsw_write_dcomp()
5568 } else if (IS_BROADWELL(i915) || IS_HASWELL(i915)) { in intel_power_domains_init_hw()
5834 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in intel_display_power_suspend_late()
5843 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_resume_early()
5856 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_suspend()
5880 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_resume()
Dintel_display_debugfs.c383 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i915_edp_psr_status()
1196 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in i915_lpsp_status()
2087 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in i915_lpsp_capability_show()
2240 if ((INTEL_GEN(dev_priv) >= 9 || IS_HASWELL(dev_priv) || in intel_connector_debugfs_add()
Dintel_display.c4345 if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) { in i9xx_check_plane_surface()
4466 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_update_plane()
6347 if (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv)) in ilk_pfit_enable()
6451 if (IS_HASWELL(dev_priv) && in hsw_pre_update_disable_ips()
6478 if (IS_HASWELL(dev_priv) && in hsw_post_update_enable_ips()
7156 if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != INVALID_PIPE) { in hsw_crtc_enable()
7835 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ilk_check_fdi_lanes()
8315 if (IS_HASWELL(dev_priv)) in transcoder_has_m2_n2()
8859 if (IS_HASWELL(dev_priv) && cpu_transcoder == TRANSCODER_EDP && in intel_set_pipe_timings()
8888 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_pipe_is_interlaced()
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Dintel_pipe_crc.c315 if (IS_HASWELL(dev_priv) && in intel_crtc_crc_setup_workarounds()
Dintel_ddi.c873 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_get_buf_trans_dp()
894 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_get_buf_trans_edp()
910 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_get_buf_trans_fdi()
930 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_get_buf_trans_hdmi()
1197 } else if (IS_HASWELL(dev_priv)) { in intel_ddi_hdmi_level()
4529 if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A && in intel_ddi_compute_config()
Dintel_cdclk.c1980 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_pixel_rate_to_cdclk()
2571 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_compute_max_dotclk()
2872 else if (IS_HASWELL(dev_priv)) in intel_init_cdclk_hooks()
Dintel_sprite.c1318 (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv)); in ivb_need_sprite_gamma()
1501 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ivb_update_plane()
3173 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_sprite_plane_create()
Dintel_color.c227 (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv) || in ilk_csc_limited_range()
2059 else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_color_init()
Dintel_hdcp.c159 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in hdcp_key_loadable()
197 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_hdcp_load_keys()

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