Home
last modified time | relevance | path

Searched refs:LANE_PLL_MASK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/gma500/
Dcdv_intel_display.c337 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
343 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
349 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
355 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
Dpsb_intel_reg.h1368 #define LANE_PLL_MASK (0x7 << 20) macro