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Searched refs:MCR (Results 1 – 14 of 14) sorted by relevance

/drivers/tty/
Damiserial.c98 int MCR; /* Modem control register */ member
527 info->MCR = 0; in startup()
529 info->MCR = SER_DTR | SER_RTS; in startup()
530 rtsdtr_ctrl(info->MCR); in startup()
594 info->MCR &= ~(SER_DTR|SER_RTS); in shutdown()
595 rtsdtr_ctrl(info->MCR); in shutdown()
903 info->MCR &= ~SER_RTS; in rs_throttle()
906 rtsdtr_ctrl(info->MCR); in rs_throttle()
925 info->MCR |= SER_RTS; in rs_unthrottle()
927 rtsdtr_ctrl(info->MCR); in rs_unthrottle()
[all …]
Dmxser.c236 int MCR; /* Modem control register */ member
603 info->MCR |= UART_MCR_DTR; in mxser_set_baud()
604 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_set_baud()
606 info->MCR &= ~UART_MCR_DTR; in mxser_set_baud()
607 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_set_baud()
713 info->MCR &= ~UART_MCR_AFE; in mxser_change_speed()
718 info->MCR |= UART_MCR_AFE; in mxser_change_speed()
748 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_change_speed()
917 info->MCR = UART_MCR_DTR | UART_MCR_RTS; in mxser_activate()
918 outb(info->MCR, info->ioaddr + UART_MCR); in mxser_activate()
[all …]
/drivers/atm/
Didt77105.c135 PUT( walk->old_mcr ,MCR); in idt77105_restart_timer_func()
231 PRIV(dev)->old_mcr = GET(MCR); in idt77105_int()
237 ) & ~IDT77105_MCR_EIP, MCR); in idt77105_int()
296 PRIV(dev)->old_mcr = GET(MCR); in idt77105_start()
299 PUT(PRIV(dev)->old_mcr, MCR); in idt77105_start()
328 PUT( GET(MCR) & ~IDT77105_MCR_EIP, MCR ); in idt77105_stop()
Diphase.h173 #define MCR 0 macro
/drivers/net/hamradio/
Dbaycom_ser_fdx.c98 #define MCR(iobase) (iobase+4) macro
290 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_interrupt()
292 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_interrupt()
348 b1 = inb(MCR(iobase)); in ser12_check_uart()
349 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart()
351 outb(0x1a, MCR(iobase)); in ser12_check_uart()
353 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart()
407 outb(0x0d, MCR(dev->base_addr)); in ser12_open()
450 outb(1, MCR(dev->base_addr)); in ser12_close()
Dbaycom_ser_hdx.c84 #define MCR(iobase) (iobase+4) macro
193 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_tx()
339 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_rx()
430 b1 = inb(MCR(iobase)); in ser12_check_uart()
431 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart()
433 outb(0x1a, MCR(iobase)); in ser12_check_uart()
435 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart()
475 outb(0x0d, MCR(dev->base_addr)); in ser12_open()
509 outb(1, MCR(dev->base_addr)); in ser12_close()
Dyam.c155 #define MCR(iobase) (iobase+4) macro
302 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_reset()
305 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_reset()
321 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_write()
470 outb(PTT_OFF, MCR(dev->base_addr)); in yam_set_uart()
501 b1 = inb(MCR(iobase)); in yam_check_uart()
502 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in yam_check_uart()
504 outb(0x1a, MCR(iobase)); in yam_check_uart()
506 outb(b1, MCR(iobase)); /* restore old values */ in yam_check_uart()
572 outb(PTT_ON, MCR(dev->base_addr)); in ptt_on()
[all …]
/drivers/dma/
Dtxx9dmac.h96 TXX9_DMA_REG32(MCR); /* Master Control Register */
102 u32 MCR; member
Dtxx9dmac.c651 mcr = dma_readl(ddev, MCR); in txx9dmac_tasklet()
676 dma_readl(ddev, MCR)); in txx9dmac_interrupt()
1077 dma_writel(ddev, MCR, 0); in txx9dmac_off()
1212 dma_writel(ddev, MCR, mcr); in txx9dmac_probe()
1254 dma_writel(ddev, MCR, mcr); in txx9dmac_resume_noirq()
/drivers/usb/serial/
Dio_16654.h36 #define MCR 4 // Modem Control Register macro
Dio_edgeport.c1496 status = send_cmd_write_uart_register(edge_port, MCR, in edge_throttle()
1533 send_cmd_write_uart_register(edge_port, MCR, in edge_unthrottle()
1615 send_cmd_write_uart_register(edge_port, MCR, edge_port->shadowMCR); in edge_tiocmset()
2403 (regNum == MCR) ? "MCR" : "LCR", __func__, regValue); in send_cmd_write_uart_register()
2407 regNum == MCR) { in send_cmd_write_uart_register()
2587 status = send_cmd_write_uart_register(edge_port, MCR, in change_port_settings()
/drivers/power/reset/
Dqnap-poweroff.c67 writel(0x00, UART1_REG(MCR)); in qnap_power_off()
/drivers/net/ethernet/smsc/
Dsmc9194.h93 #define MCR 10 macro
Dsmc9194.c935 memory_cfg_register = inw( ioaddr + MCR ); in smc_probe()