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Searched refs:MCTL_RCH_OV0_SEL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/hisilicon/kirin/
Dkirin_dpe_reg.h163 #define MCTL_RCH_OV0_SEL (0x0180) macro
Dkirin_drm_dpe.c428 dpe_set_reg(mctl_sys_base + MCTL_RCH_OV0_SEL, 0x8, 4, 0); in dpe_ovl_init()
795 dpe_set_reg(mctl_sys_base + MCTL_RCH_OV0_SEL, 0x8, 4, 0); in dpe_mctl_sys_config()
796 dpe_set_reg(mctl_sys_base + MCTL_RCH_OV0_SEL, ch, 4, in dpe_mctl_sys_config()