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Searched refs:MC_SEQ_WR_CTL_2_LP (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/radeon/
Dsid.h592 #define MC_SEQ_WR_CTL_2_LP 0x2b58 macro
Dcikd.h717 #define MC_SEQ_WR_CTL_2_LP 0x2b58 macro
Dsi_dpm.c5453 *out_reg = MC_SEQ_WR_CTL_2_LP >> 2; in si_check_s0_mc_reg_index()
5540 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in si_initialize_mc_reg_table()
Dci_dpm.c4455 *out_reg = MC_SEQ_WR_CTL_2_LP >> 2; in ci_check_s0_mc_reg_index()
4640 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in ci_initialize_mc_reg_table()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h593 #define MC_SEQ_WR_CTL_2_LP 0xAD6 macro
/drivers/gpu/drm/amd/pm/powerplay/
Dsi_dpm.c5904 *out_reg = MC_SEQ_WR_CTL_2_LP; in si_check_s0_mc_reg_index()
5991 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in si_initialize_mc_reg_table()