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Searched refs:MTYPE_CC (Results 1 – 25 of 26) sorted by relevance

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/drivers/gpu/drm/amd/amdkfd/
Dkfd_device_queue_manager_vi.c108 MTYPE_CC : in set_cache_memory_policy_vi()
112 MTYPE_CC : in set_cache_memory_policy_vi()
166 MTYPE_CC << SH_MEM_CONFIG__DEFAULT_MTYPE__SHIFT | in update_qpd_vi()
167 MTYPE_CC << SH_MEM_CONFIG__APE1_MTYPE__SHIFT | in update_qpd_vi()
Dkfd_mqd_manager_vi.c243 __update_mqd(mm, mqd, q, MTYPE_CC, 1); in update_mqd()
/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_1_enum.h993 MTYPE_CC = 0x2, enumerator
Dbif_5_0_enum.h1123 MTYPE_CC = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_8_2_enum.h993 MTYPE_CC = 0x2, enumerator
Dgmc_8_1_enum.h1123 MTYPE_CC = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_8_0_enum.h993 MTYPE_CC = 0x2, enumerator
Dsmu_7_1_3_enum.h1207 MTYPE_CC = 0x2, enumerator
Dsmu_7_1_2_enum.h1171 MTYPE_CC = 0x2, enumerator
Dsmu_7_1_1_enum.h1153 MTYPE_CC = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_6_0_enum.h1006 MTYPE_CC = 0x2, enumerator
Duvd_5_0_enum.h1136 MTYPE_CC = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_enum.h1288 MTYPE_CC = 0x2, enumerator
Doss_3_0_1_enum.h1389 MTYPE_CC = 0x2, enumerator
Doss_3_0_enum.h1422 MTYPE_CC = 0x2, enumerator
/drivers/gpu/drm/amd/amdgpu/
Dgmc_v10_0.c526 return AMDGPU_PTE_MTYPE_NV10(MTYPE_CC); in gmc_v10_0_map_mtype()
Dgmc_v9_0.c1025 return AMDGPU_PTE_MTYPE_VG10(MTYPE_CC); in gmc_v9_0_map_mtype()
Dgfx_v8_0.c3709 MTYPE_CC << SH_MEM_CONFIG__DEFAULT_MTYPE__SHIFT | in gfx_v8_0_init_compute_vmid()
/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_10_0_enum.h1698 MTYPE_CC = 0x2, enumerator
Ddce_11_0_enum.h5565 MTYPE_CC = 0x2, enumerator
Ddce_11_2_enum.h6203 MTYPE_CC = 0x2, enumerator
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_enum.h6231 MTYPE_CC = 0x2, enumerator
Dgfx_8_0_enum.h6783 MTYPE_CC = 0x2, enumerator
Dgfx_8_1_enum.h6733 MTYPE_CC = 0x2, enumerator
/drivers/gpu/drm/amd/include/
Dvega10_enum.h1041 MTYPE_CC = 0x00000002, enumerator

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