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Searched refs:NVVAL (Results 1 – 25 of 39) sorted by relevance

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/drivers/gpu/drm/nouveau/dispnv50/
Dhead907d.c47 NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in head907d_or()
48 NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in head907d_or()
49 NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in head907d_or()
50 NVVAL(NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, asyh->or.depth), in head907d_or()
53 NVVAL(NV907D, HEAD_SET_CONTROL, STRUCTURE, asyh->mode.interlace)); in head907d_or()
70 NVVAL(NV907D, HEAD_SET_PROCAMP, SAT_COS, asyh->procamp.sat.cos) | in head907d_procamp()
71 NVVAL(NV907D, HEAD_SET_PROCAMP, SAT_SINE, asyh->procamp.sat.sin) | in head907d_procamp()
88 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head907d_dither()
89 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | in head907d_dither()
90 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | in head907d_dither()
[all …]
Dhead507d.c42 NVVAL(NV507D, HEAD_SET_PROCAMP, SAT_COS, asyh->procamp.sat.cos) | in head507d_procamp()
43 NVVAL(NV507D, HEAD_SET_PROCAMP, SAT_SINE, asyh->procamp.sat.sin) | in head507d_procamp()
59 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head507d_dither()
60 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | in head507d_dither()
61 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | in head507d_dither()
62 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head507d_dither()
151 NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) | in head507d_curs_set()
152 NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head507d_curs_set()
153 NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) | in head507d_curs_set()
154 NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) | in head507d_curs_set()
[all …]
Dwndwc37e.c76 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, OUTPUT_MODE, asyw->xlut.i.output_mode) | in wndwc37e_ilut_set()
77 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, RANGE, asyw->xlut.i.range) | in wndwc37e_ilut_set()
78 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, SIZE, asyw->xlut.i.size), in wndwc37e_ilut_set()
110 NVVAL(NVC37E, SET_COMPOSITION_CONTROL, DEPTH, asyw->blend.depth), in wndwc37e_blend_set()
113 NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K1, asyw->blend.k1) | in wndwc37e_blend_set()
114 NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K2, 0), in wndwc37e_blend_set()
117 NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, SRC_COLOR_FACTOR_MATCH_SELECT, in wndwc37e_blend_set()
119 NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, SRC_COLOR_FACTOR_NO_MATCH_SELECT, in wndwc37e_blend_set()
121 NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, DST_COLOR_FACTOR_MATCH_SELECT, in wndwc37e_blend_set()
123 NVVAL(NVC37E, SET_COMPOSITION_FACTOR_SELECT, DST_COLOR_FACTOR_NO_MATCH_SELECT, in wndwc37e_blend_set()
[all …]
Dheadc37d.c56 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in headc37d_or()
57 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in headc37d_or()
58 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in headc37d_or()
59 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) | in headc37d_or()
77 NVVAL(NVC37D, HEAD_SET_PROCAMP, SAT_COS, asyh->procamp.sat.cos) | in headc37d_procamp()
78 NVVAL(NVC37D, HEAD_SET_PROCAMP, SAT_SINE, asyh->procamp.sat.sin) | in headc37d_procamp()
96 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in headc37d_dither()
97 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | in headc37d_dither()
99 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | in headc37d_dither()
100 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in headc37d_dither()
[all …]
Dhead827d.c60 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) | in head827d_curs_set()
61 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head827d_curs_set()
62 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) | in head827d_curs_set()
63 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) | in head827d_curs_set()
84 NVVAL(NV827D, HEAD_SET_OFFSET, ORIGIN, asyh->core.offset >> 8)); in head827d_core_set()
87 NVVAL(NV827D, HEAD_SET_SIZE, WIDTH, asyh->core.w) | in head827d_core_set()
88 NVVAL(NV827D, HEAD_SET_SIZE, HEIGHT, asyh->core.h), in head827d_core_set()
91 NVVAL(NV827D, HEAD_SET_STORAGE, BLOCK_HEIGHT, asyh->core.blockh) | in head827d_core_set()
92 NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.pitch >> 8) | in head827d_core_set()
93 NVVAL(NV827D, HEAD_SET_STORAGE, PITCH, asyh->core.blocks) | in head827d_core_set()
[all …]
Dbase827c.c38 NVVAL(NV827C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) | in base827c_image_set()
39 NVVAL(NV827C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval)); in base827c_image_set()
48 NVVAL(NV827C, SET_CONVERSION, GAIN, 0) | in base827c_image_set()
49 NVVAL(NV827C, SET_CONVERSION, OFS, 0x64)); in base827c_image_set()
55 NVVAL(NV827C, SET_CONVERSION, GAIN, 0) | in base827c_image_set()
56 NVVAL(NV827C, SET_CONVERSION, OFS, 0)); in base827c_image_set()
63 NVVAL(NV827C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) | in base827c_image_set()
64 NVVAL(NV827C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h), in base827c_image_set()
67 NVVAL(NV827C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) | in base827c_image_set()
68 NVVAL(NV827C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) | in base827c_image_set()
[all …]
Dwndwc57e.c44 NVVAL(NVC57E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) | in wndwc57e_image_set()
45 NVVAL(NVC57E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) | in wndwc57e_image_set()
49 NVVAL(NVC57E, SET_SIZE, WIDTH, asyw->image.w) | in wndwc57e_image_set()
50 NVVAL(NVC57E, SET_SIZE, HEIGHT, asyw->image.h), in wndwc57e_image_set()
53 NVVAL(NVC57E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) | in wndwc57e_image_set()
54 NVVAL(NVC57E, SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout), in wndwc57e_image_set()
57 NVVAL(NVC57E, SET_PARAMS, FORMAT, asyw->image.format) | in wndwc57e_image_set()
63 NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) | in wndwc57e_image_set()
64 NVVAL(NVC57E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6)); in wndwc57e_image_set()
70 NVVAL(NVC57E, SET_POINT_IN, X, asyw->state.src_x >> 16) | in wndwc57e_image_set()
[all …]
Dovly507e.c45 NVVAL(NV507E, SET_POINT_IN, X, asyw->scale.sx) | in ovly507e_scale_set()
46 NVVAL(NV507E, SET_POINT_IN, Y, asyw->scale.sy), in ovly507e_scale_set()
49 NVVAL(NV507E, SET_SIZE_IN, WIDTH, asyw->scale.sw) | in ovly507e_scale_set()
50 NVVAL(NV507E, SET_SIZE_IN, HEIGHT, asyw->scale.sh), in ovly507e_scale_set()
53 NVVAL(NV507E, SET_SIZE_OUT, WIDTH, asyw->scale.dw)); in ovly507e_scale_set()
68 NVVAL(NV507E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval)); in ovly507e_image_set()
78 NVVAL(NV507E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) | in ovly507e_image_set()
79 NVVAL(NV507E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h), in ovly507e_image_set()
82 NVVAL(NV507E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) | in ovly507e_image_set()
83 NVVAL(NV507E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) | in ovly507e_image_set()
[all …]
Dheadc57d.c56 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) | in headc57d_or()
57 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) | in headc57d_or()
58 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) | in headc57d_or()
59 NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) | in headc57d_or()
108 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, INTERPOLATE, asyh->olut.output_mode) | in headc57d_olut_set()
110 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, MODE, asyh->olut.mode) | in headc57d_olut_set()
111 NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, SIZE, asyh->olut.size), in headc57d_olut_set()
200 NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) | in headc57d_mode()
201 NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active), in headc57d_mode()
204 NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) | in headc57d_mode()
[all …]
Dovly907e.c40 NVVAL(NV907E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval)); in ovly907e_image_set()
50 NVVAL(NV907E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) | in ovly907e_image_set()
51 NVVAL(NV907E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h), in ovly907e_image_set()
54 NVVAL(NV907E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) | in ovly907e_image_set()
55 NVVAL(NV907E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) | in ovly907e_image_set()
56 NVVAL(NV907E, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) | in ovly907e_image_set()
57 NVVAL(NV907E, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout), in ovly907e_image_set()
60 NVVAL(NV907E, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) | in ovly907e_image_set()
61 NVVAL(NV907E, SURFACE_SET_PARAMS, COLOR_SPACE, asyw->image.colorspace)); in ovly907e_image_set()
Dbase507c.c61 NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0)); in base507c_image_clr()
77 NVVAL(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) | in base507c_image_set()
78 NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval)); in base507c_image_set()
87 NVVAL(NV507C, SET_CONVERSION, GAIN, 0) | in base507c_image_set()
88 NVVAL(NV507C, SET_CONVERSION, OFS, 0x64)); in base507c_image_set()
94 NVVAL(NV507C, SET_CONVERSION, GAIN, 0) | in base507c_image_set()
95 NVVAL(NV507C, SET_CONVERSION, OFS, 0)); in base507c_image_set()
101 NVVAL(NV507C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) | in base507c_image_set()
102 NVVAL(NV507C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h), in base507c_image_set()
105 NVVAL(NV507C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout) | in base507c_image_set()
[all …]
Dovly827e.c43 NVVAL(NV827E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval)); in ovly827e_image_set()
53 NVVAL(NV827E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) | in ovly827e_image_set()
54 NVVAL(NV827E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h), in ovly827e_image_set()
57 NVVAL(NV827E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) | in ovly827e_image_set()
58 NVVAL(NV827E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) | in ovly827e_image_set()
59 NVVAL(NV827E, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) | in ovly827e_image_set()
60 NVVAL(NV827E, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout), in ovly827e_image_set()
63 NVVAL(NV827E, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) | in ovly827e_image_set()
64 NVVAL(NV827E, SURFACE_SET_PARAMS, COLOR_SPACE, asyw->image.colorspace)); in ovly827e_image_set()
Dbase907c.c38 NVVAL(NV907C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) | in base907c_image_set()
40 NVVAL(NV907C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval)); in base907c_image_set()
48 NVVAL(NV907C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) | in base907c_image_set()
49 NVVAL(NV907C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h), in base907c_image_set()
52 NVVAL(NV907C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) | in base907c_image_set()
53 NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) | in base907c_image_set()
54 NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) | in base907c_image_set()
55 NVVAL(NV907C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout), in base907c_image_set()
58 NVVAL(NV907C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) | in base907c_image_set()
94 NVVAL(NV907C, SET_BASE_LUT_LO, ENABLE, asyw->xlut.i.enable) | in base907c_xlut_set()
[all …]
Dhead917d.c41 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head917d_dither()
42 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | in head917d_dither()
43 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | in head917d_dither()
44 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); in head917d_dither()
90 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, FORMAT, asyh->curs.format) | in head917d_curs_set()
91 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head917d_curs_set()
92 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_X, 0) | in head917d_curs_set()
93 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, HOT_SPOT_Y, 0) | in head917d_curs_set()
Dpior507d.c37 ctrl |= NVVAL(NV507D, PIOR_SET_CONTROL, HSYNC_POLARITY, asyh->or.nhsync); in pior507d_ctrl()
38 ctrl |= NVVAL(NV507D, PIOR_SET_CONTROL, VSYNC_POLARITY, asyh->or.nvsync); in pior507d_ctrl()
39 ctrl |= NVVAL(NV837D, PIOR_SET_CONTROL, PIXEL_DEPTH, asyh->or.depth); in pior507d_ctrl()
Dsor507d.c37 ctrl |= NVVAL(NV507D, SOR_SET_CONTROL, HSYNC_POLARITY, asyh->or.nhsync); in sor507d_ctrl()
38 ctrl |= NVVAL(NV507D, SOR_SET_CONTROL, VSYNC_POLARITY, asyh->or.nvsync); in sor507d_ctrl()
39 ctrl |= NVVAL(NV837D, SOR_SET_CONTROL, PIXEL_DEPTH, asyh->or.depth); in sor507d_ctrl()
Dwimmc37b.c41 NVVAL(NVC37B, UPDATE, INTERLOCK_WITH_WINDOW, in wimmc37b_update()
56 NVVAL(NVC37B, SET_POINT_OUT, X, asyw->point.x) | in wimmc37b_point()
57 NVVAL(NVC37B, SET_POINT_OUT, Y, asyw->point.y)); in wimmc37b_point()
Ddac507d.c37 sync |= NVVAL(NV507D, DAC_SET_POLARITY, HSYNC, asyh->or.nhsync); in dac507d_ctrl()
38 sync |= NVVAL(NV507D, DAC_SET_POLARITY, VSYNC, asyh->or.nvsync); in dac507d_ctrl()
Dcursc37a.c44 NVVAL(NVC37A, SET_CURSOR_HOT_SPOT_POINT_OUT, X, asyw->point.x) | in cursc37a_point()
45 NVVAL(NVC37A, SET_CURSOR_HOT_SPOT_POINT_OUT, Y, asyw->point.y)); in cursc37a_point()
/drivers/gpu/drm/nouveau/
Dnouveau_bo5039.c77 NVVAL(NV5039, SET_SRC_ORIGIN, X, 0) | in nv50_bo_move_m2mf()
78 NVVAL(NV5039, SET_SRC_ORIGIN, Y, 0)); in nv50_bo_move_m2mf()
99 NVVAL(NV5039, SET_DST_ORIGIN, X, 0) | in nv50_bo_move_m2mf()
100 NVVAL(NV5039, SET_DST_ORIGIN, Y, 0)); in nv50_bo_move_m2mf()
107 NVVAL(NV5039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)), in nv50_bo_move_m2mf()
110 NVVAL(NV5039, OFFSET_OUT_UPPER, VALUE, upper_32_bits(dst_offset))); in nv50_bo_move_m2mf()
Dnv50_fbcon.c214 NVVAL(NV502D, SET_DST_FORMAT, V, format), in nv50_fbcon_accel_init()
224 NVVAL(NV502D, SET_DST_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)), in nv50_fbcon_accel_init()
227 NVVAL(NV502D, SET_DST_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr))); in nv50_fbcon_accel_init()
230 NVVAL(NV502D, SET_SRC_FORMAT, V, format), in nv50_fbcon_accel_init()
240 NVVAL(NV502D, SET_SRC_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)), in nv50_fbcon_accel_init()
243 NVVAL(NV502D, SET_SRC_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr))); in nv50_fbcon_accel_init()
249 NVVAL(NV502D, SET_ROP, V, 0x55)); in nv50_fbcon_accel_init()
264 NVVAL(NV502D, SET_RENDER_SOLID_PRIM_COLOR_FORMAT, V, format)); in nv50_fbcon_accel_init()
270 NVVAL(NV502D, SET_PIXELS_FROM_CPU_COLOR_FORMAT, V, format), in nv50_fbcon_accel_init()
Dnvc0_fbcon.c212 NVVAL(NV902D, SET_DST_FORMAT, V, format), in nvc0_fbcon_accel_init()
222 NVVAL(NV902D, SET_DST_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)), in nvc0_fbcon_accel_init()
225 NVVAL(NV902D, SET_DST_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr))); in nvc0_fbcon_accel_init()
228 NVVAL(NV902D, SET_SRC_FORMAT, V, format), in nvc0_fbcon_accel_init()
238 NVVAL(NV902D, SET_SRC_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)), in nvc0_fbcon_accel_init()
241 NVVAL(NV902D, SET_SRC_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr))); in nvc0_fbcon_accel_init()
247 NVVAL(NV902D, SET_ROP, V, 0x55)); in nvc0_fbcon_accel_init()
262 NVVAL(NV902D, SET_RENDER_SOLID_PRIM_COLOR_FORMAT, V, format)); in nvc0_fbcon_accel_init()
268 NVVAL(NV902D, SET_PIXELS_FROM_CPU_COLOR_FORMAT, V, format), in nvc0_fbcon_accel_init()
/drivers/gpu/drm/nouveau/include/nvif/
Dpush507c.h11 NVVAL(NV507C, DMA, METHOD_COUNT, (c)) | \
12 NVVAL(NV507C, DMA, METHOD_OFFSET, (m) >> 2), \
22 NVVAL(NV507C, DMA, JUMP_OFFSET, (o) >> 2), \
Dpush906f.h26 PUSH_DATA__((p), NVVAL(NV906F, DMA, METHOD_ADDRESS, (m) >> 2) | \
27 NVVAL(NV906F, DMA, METHOD_SUBCHANNEL, (s)) | \
28 NVVAL(NV906F, DMA, METHOD_COUNT, (c)) | \
Dpushc37b.h11 NVVAL(NVC37B, DMA, METHOD_COUNT, (c)) | \
12 NVVAL(NVC37B, DMA, METHOD_OFFSET, (m) >> 2), \

12