Home
last modified time | relevance | path

Searched refs:OD (Results 1 – 6 of 6) sorted by relevance

/drivers/video/fbdev/kyro/
DSTG4000InitDevice.c121 u32 R = 0, F = 0, OD = 0, ODIndex = 0; in ProgramClock() local
144 OD = ODValues[ODIndex]; in ProgramClock()
150 ulTmp = R * (ulScaleClockReq << OD); in ProgramClock()
181 ulTmp = (ulVCO >> OD); /* Clock = VCO / (2^OD) */ in ProgramClock()
192 ulBestOD = OD; in ProgramClock()
207 if ((ulScore >= ulBestScore) && (OD > 0)) { in ProgramClock()
208 ulBestOD = OD; in ProgramClock()
/drivers/staging/sm750fb/
Dddk750_chip.c37 unsigned int M, N, OD, POD; in get_mxclk_freq() local
45 OD = (pll_reg & PLL_CTRL_OD_MASK) >> PLL_CTRL_OD_SHIFT; in get_mxclk_freq()
48 return DEFAULT_INPUT_CLOCK * M / N / BIT(OD) / BIT(POD); in get_mxclk_freq()
375 pll->OD = d - pll->POD; in sm750_calc_pll_value()
390 unsigned int OD = p_PLL->OD; in sm750_format_pll_reg() local
404 ((OD << PLL_CTRL_OD_SHIFT) & PLL_CTRL_OD_MASK) | in sm750_format_pll_reg()
Dddk750_chip.h49 unsigned long OD; member
/drivers/gpu/drm/hisilicon/hibmc/
Dhibmc_drm_de.c28 unsigned long OD; member
247 pllreg |= HIBMC_FIELD(HIBMC_PLL_CTRL_OD, pll.OD); in format_pll_reg()
/drivers/mmc/host/
Domap_hsmmc.c101 #define OD 0x1 macro
618 OMAP_HSMMC_WRITE(host->base, CON, con | OD); in omap_hsmmc_set_bus_mode()
620 OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); in omap_hsmmc_set_bus_mode()
/drivers/pinctrl/
Dpinctrl-st.c151 #define ST_PINCONF_UNPACK_OD(conf) ST_PINCONF_UNPACK(conf, OD)
152 #define ST_PINCONF_PACK_OD(conf) ST_PINCONF_PACK(conf, 1, OD)