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Searched refs:PW0_ENABLE (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/tegra/
Ddc.h185 #define PW0_ENABLE (1 << 0) macro
Ddc.c1785 value &= ~(PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | in tegra_crtc_atomic_disable()
1910 value |= PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | in tegra_crtc_atomic_enable()