| /drivers/infiniband/hw/hfi1/ |
| D | trace.c | 300 case OP(RC, SEND_LAST_WITH_IMMEDIATE): in parse_everbs_hdrs()
302 case OP(RC, SEND_ONLY_WITH_IMMEDIATE): in parse_everbs_hdrs()
304 case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE): in parse_everbs_hdrs()
310 case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE): in parse_everbs_hdrs()
319 case OP(RC, RDMA_READ_REQUEST): in parse_everbs_hdrs()
320 case OP(RC, RDMA_WRITE_FIRST): in parse_everbs_hdrs()
322 case OP(RC, RDMA_WRITE_ONLY): in parse_everbs_hdrs()
329 case OP(RC, RDMA_READ_RESPONSE_FIRST): in parse_everbs_hdrs()
330 case OP(RC, RDMA_READ_RESPONSE_LAST): in parse_everbs_hdrs()
331 case OP(RC, RDMA_READ_RESPONSE_ONLY): in parse_everbs_hdrs()
[all …]
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| /drivers/pci/controller/dwc/ |
| D | Kconfig | 33 This controller can work either as EP or RC. In order to enable
48 This controller can work either as EP or RC. In order to enable
65 This controller can work either as EP or RC. In order to enable
80 This controller can work either as EP or RC. In order to enable
141 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
143 controller works in RC mode.
153 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
155 controller works in RC mode.
263 Tegra194. This controller can work either as EP or RC. In order to
278 Tegra194. This controller can work either as EP or RC. In order to
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| D | pci-keystone.c | 97 #define RC 0x2 macro
1064 val = KS_PCIE_DEV_TYPE(RC) | KS_PCIE_SYSCLOCKOUTEN; in ks_pcie_set_mode()
1092 val = RC; in ks_pcie_am654_set_mode()
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| /drivers/media/cec/ |
| D | Kconfig | 12 bool "HDMI CEC RC integration"
16 Pass on CEC remote control messages to the RC framework.
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| /drivers/clocksource/ |
| D | timer-atmel-tcb.c | 80 tcb_cache[i].rc = readl(tcaddr + ATMEL_TC_REG(i, RC)); in tc_clksrc_suspend()
95 writel(tcb_cache[i].rc, tcaddr + ATMEL_TC_REG(i, RC)); in tc_clksrc_resume()
208 writel((tcd->rate + HZ / 2) / HZ, tcaddr + ATMEL_TC_REG(2, RC)); in tc_set_periodic()
221 writel_relaxed(delta, tcaddr + ATMEL_TC_REG(2, RC)); in tc_next_event()
323 writel(0x8000, tcaddr + ATMEL_TC_REG(0, RC)); in tcb_setup_dual_chan()
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| /drivers/staging/mt7621-pci/ |
| D | mediatek,mt7621-pci.txt | 45 0x1e142000 0x100 /* pcie port 0 RC control registers */
46 0x1e143000 0x100 /* pcie port 1 RC control registers */
47 0x1e144000 0x100>; /* pcie port 2 RC control registers */
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_afmt.c | 98 cea_channels.channels.RC_RLC_FLC = speaker_flags.RC; in speakers_to_channels()
100 cea_channels.channels.RL_RC = speaker_flags.RC; in speakers_to_channels()
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| /drivers/pwm/ |
| D | pwm-atmel-tcb.c | 115 tcbpwm->period = __raw_readl(regs + ATMEL_TC_REG(group, RC)); in atmel_tcb_pwm_request()
273 __raw_writel(tcbpwm->period, regs + ATMEL_TC_REG(group, RC)); in atmel_tcb_pwm_enable()
473 chan->rc = readl(base + ATMEL_TC_REG(i, RC)); in atmel_tcb_pwm_suspend()
490 writel(chan->rc, base + ATMEL_TC_REG(i, RC)); in atmel_tcb_pwm_resume()
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| /drivers/media/rc/ |
| D | Kconfig | 57 tristate "Enable IR raw decoder for the RC-5 protocol"
62 Enable this option if you have IR with RC-5 protocol, and
138 tristate "Enable IR raw decoder for the RC-MM protocol"
141 Enable this option when you have IR with RC-MM protocol, and
143 24 and 32 bits RC-MM variants. You can enable or disable the
144 different modes using the following RC protocol keywords:
359 spaces, which is not enough for the NEC, Sanyo and RC-6 protocol.
507 The HW decoder supports NEC, RC-5, RC-6 IR protocols.
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| /drivers/media/rc/keymaps/ |
| D | Kconfig | 14 provide the tool and the same RC maps for load from
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| /drivers/staging/mt7621-dts/ |
| D | mt7621.dtsi | 511 0x1e142000 0x100 /* pcie port 0 RC control registers */
512 0x1e143000 0x100 /* pcie port 1 RC control registers */
513 0x1e144000 0x100>; /* pcie port 2 RC control registers */
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| /drivers/input/joystick/ |
| D | Kconfig | 210 tristate "5-byte Zhenhua RC transmitter"
323 tristate "Walkera WK-0701 RC transmitter"
377 tristate "FlySky FS-iA6B RC Receiver"
380 Say Y here if you use a FlySky FS-i6 RC remote control along with the
381 FS-iA6B RC receiver as a joystick input device.
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| /drivers/dma/ |
| D | hisi_dma.c | 41 RC, enumerator
506 writel_relaxed(mode == RC ? 1 : 0, hdma_dev->base + HISI_DMA_MODE); in hisi_dma_set_mode()
571 hisi_dma_set_mode(hdma_dev, RC); in hisi_dma_probe()
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| /drivers/staging/media/ |
| D | Kconfig | 8 Most of them don't follow properly the V4L, DVB and/or RC API's,
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| /drivers/nfc/ |
| D | Kconfig | 48 RC-S380 dongle.
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| /drivers/infiniband/hw/mthca/ |
| D | mthca_qp.c | 285 enum { RC, UC, UD, RD, RDEE, MLX, NUM_TRANS }; enumerator
290 case RC: return MTHCA_QP_ST_RC; in to_mthca_st()
476 if (qp->transport == RC || qp->transport == UC) { in mthca_query_qp()
1021 case RC: in mthca_alloc_wqe_buf()
1301 case IB_QPT_RC: qp->transport = RC; break; in mthca_alloc_qp()
1683 case RC: in mthca_tavor_post_send()
2013 case RC: in mthca_arbel_post_send()
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| /drivers/infiniband/core/ |
| D | cma_trace.h | 144 ib_qp_type(RC) \
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_stream_encoder.c | 1192 cea_channels.channels.RC_RLC_FLC = speaker_flags.RC; in speakers_to_channels()
1194 cea_channels.channels.RL_RC = speaker_flags.RC; in speakers_to_channels()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_stream_encoder.c | 1234 cea_channels.channels.RC_RLC_FLC = speaker_flags.RC; in speakers_to_channels()
1236 cea_channels.channels.RL_RC = speaker_flags.RC; in speakers_to_channels()
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| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_types.h | 559 uint32_t RC:1; member
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| /drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramnv50.c | 109 timing[0] = (T(RP) << 24 | T(RAS) << 16 | T(RFC) << 8 | T(RC)); in nv50_ram_timing_calc()
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| D | ramgt215.c | 374 timing[0] = (T(RP) << 24 | T(RAS) << 16 | T(RFC) << 8 | T(RC)); in gt215_ram_timing_calc()
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| /drivers/char/ |
| D | Kconfig | 205 manufactured by RC Systems (<https://www.rcsys.com/>). It is also
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| /drivers/hid/ |
| D | Kconfig | 849 bool "CIR via RC class" if EXPERT
|